Collaboration diagram for SCB Registers:

Macros
#define	SCB_CPUID MMIO32(SCB_BASE + 0x00)
	CPUID: CPUID base register. More...

#define	SCB_ICSR MMIO32(SCB_BASE + 0x04)
	ICSR: Interrupt Control State Register. More...

#define	SCB_VTOR MMIO32(SCB_BASE + 0x08)
	VTOR: Vector Table Offset Register. More...

#define	SCB_AIRCR MMIO32(SCB_BASE + 0x0C)
	AIRCR: Application Interrupt and Reset Control Register. More...

#define	SCB_SCR MMIO32(SCB_BASE + 0x10)
	SCR: System Control Register. More...

#define	SCB_CCR MMIO32(SCB_BASE + 0x14)
	CCR: Configuration Control Register. More...

#define	SCB_SHPR32(ipr_id) MMIO32(SCS_BASE + 0xD18 + ((ipr_id) * 4))
	System Handler Priority 8 bits Registers, SHPR1/2/3. More...

#define	SCB_SHCSR MMIO32(SCB_BASE + 0x24)
	SHCSR: System Handler Control and State Register. More...

#define	SCB_DFSR MMIO32(SCB_BASE + 0x30)
	DFSR: Debug Fault Status Register. More...

Detailed Description

Macro Definition Documentation

◆ SCB_AIRCR

#define SCB_AIRCR MMIO32(SCB_BASE + 0x0C)

AIRCR: Application Interrupt and Reset Control Register.

Definition at line 52 of file scb.h.

◆ SCB_CCR

#define SCB_CCR MMIO32(SCB_BASE + 0x14)

CCR: Configuration Control Register.

Definition at line 58 of file scb.h.

◆ SCB_CPUID

#define SCB_CPUID MMIO32(SCB_BASE + 0x00)

CPUID: CPUID base register.

Definition at line 43 of file scb.h.

◆ SCB_DFSR

#define SCB_DFSR MMIO32(SCB_BASE + 0x30)

DFSR: Debug Fault Status Register.

Definition at line 75 of file scb.h.

◆ SCB_ICSR

#define SCB_ICSR MMIO32(SCB_BASE + 0x04)

ICSR: Interrupt Control State Register.

Definition at line 46 of file scb.h.

◆ SCB_SCR

#define SCB_SCR MMIO32(SCB_BASE + 0x10)

SCR: System Control Register.

Definition at line 55 of file scb.h.

◆ SCB_SHCSR

#define SCB_SHCSR MMIO32(SCB_BASE + 0x24)

SHCSR: System Handler Control and State Register.

Definition at line 72 of file scb.h.

◆ SCB_SHPR32

#define SCB_SHPR32 ( ipr_id ) MMIO32(SCS_BASE + 0xD18 + ((ipr_id) * 4))

System Handler Priority 8 bits Registers, SHPR1/2/3.

Note: : 12 8bit Registers; : 2 32bit Registers on CM0, requires word access, (shpr1 doesn't actually exist)

Definition at line 66 of file scb.h.

◆ SCB_VTOR

#define SCB_VTOR MMIO32(SCB_BASE + 0x08)

VTOR: Vector Table Offset Register.

Definition at line 49 of file scb.h.

Macros