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#define | FICR_BASE (0x10000000U) |
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#define | UICR_BASE (0x10001000U) |
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#define | APB_BASE (0x40000000U) |
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#define | AHB_BASE (0x50000000U) |
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#define | PPB_BASE (0xE0000000U) |
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#define | CLOCK_BASE (APB_BASE) |
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#define | POWER_BASE (APB_BASE) |
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#define | RADIO_BASE (APB_BASE + 0x1000) |
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#define | UART0_BASE (APB_BASE + 0x2000) |
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#define | SPI0_BASE (APB_BASE + 0x3000) |
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#define | TWI0_BASE (APB_BASE + 0x3000) |
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#define | I2C0_BASE (APB_BASE + 0x3000) |
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#define | SPI1_BASE (APB_BASE + 0x4000) |
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#define | SPIS1_BASE (APB_BASE + 0x4000) |
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#define | TWI1_BASE (APB_BASE + 0x4000) |
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#define | I2C1_BASE (APB_BASE + 0x4000) |
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#define | GPIOTE_BASE (APB_BASE + 0x6000) |
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#define | ADC_BASE (APB_BASE + 0x7000) |
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#define | TIMER0_BASE (APB_BASE + 0x8000) |
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#define | TIMER1_BASE (APB_BASE + 0x9000) |
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#define | TIMER2_BASE (APB_BASE + 0xA000) |
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#define | RTC0_BASE (APB_BASE + 0xB000) |
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#define | TEMP_BASE (APB_BASE + 0xC000) |
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#define | RNG_BASE (APB_BASE + 0xD000) |
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#define | ECB_BASE (APB_BASE + 0xE000) |
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#define | AAR_BASE (APB_BASE + 0xF000) |
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#define | CCM_BASE (APB_BASE + 0xF000) |
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#define | WDT_BASE (APB_BASE + 0x10000) |
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#define | RTC1_BASE (APB_BASE + 0x11000) |
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#define | QDEC_BASE (APB_BASE + 0x12000) |
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#define | LPCOMP_BASE (APB_BASE + 0x13000) |
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#define | SWI0_BASE (APB_BASE + 0x14000) |
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#define | SWI1_BASE (APB_BASE + 0x15000) |
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#define | SWI2_BASE (APB_BASE + 0x16000) |
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#define | SWI3_BASE (APB_BASE + 0x17000) |
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#define | SWI4_BASE (APB_BASE + 0x18000) |
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#define | SWI5_BASE (APB_BASE + 0x19000) |
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#define | NVMC_BASE (APB_BASE + 0x1E000) |
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#define | PPI_BASE (APB_BASE + 0x1F000) |
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#define | RTC2_BASE (APB_BASE + 0x24000) |
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#define | GPIO_BASE (AHB_BASE) |
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#define | NVMC_BASE (APB_BASE + 0x1E000) |
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