Macros | |
| #define | DAC_CR(dac) MMIO32((dac) + 0x00) |
| DAC control register (DAC_CR) More... | |
| #define | DAC_SWTRIGR(dac) MMIO32((dac) + 0x04) |
| DAC software trigger register (DAC_SWTRIGR) More... | |
| #define | DAC_DHR12R1(dac) MMIO32((dac) + 0x08) |
| DAC channel1 12-bit right-aligned data holding register (DAC_DHR12R1) More... | |
| #define | DAC_DHR12L1(dac) MMIO32((dac) + 0x0C) |
| DAC channel1 12-bit left aligned data holding register (DAC_DHR12L1) More... | |
| #define | DAC_DHR8R1(dac) MMIO32((dac) + 0x10) |
| DAC channel1 8-bit right aligned data holding register (DAC_DHR8R1) More... | |
| #define | DAC_DHR12R2(dac) MMIO32((dac) + 0x14) |
| DAC channel2 12-bit right aligned data holding register (DAC_DHR12R2) More... | |
| #define | DAC_DHR12L2(dac) MMIO32((dac) + 0x18) |
| DAC channel2 12-bit left aligned data holding register (DAC_DHR12L2) More... | |
| #define | DAC_DHR8R2(dac) MMIO32((dac) + 0x1C) |
| DAC channel2 8-bit right-aligned data holding register (DAC_DHR8R2) More... | |
| #define | DAC_DHR12RD(dac) MMIO32((dac) + 0x20) |
| Dual DAC 12-bit right-aligned data holding register (DAC_DHR12RD) More... | |
| #define | DAC_DHR12LD(dac) MMIO32((dac) + 0x24) |
| DUAL DAC 12-bit left aligned data holding register (DAC_DHR12LD) More... | |
| #define | DAC_DHR8RD(dac) MMIO32((dac) + 0x28) |
| DUAL DAC 8-bit right aligned data holding register (DAC_DHR8RD) More... | |
| #define | DAC_DOR1(dac) MMIO32((dac) + 0x2C) |
| DAC channel1 data output register (DAC_DOR1) More... | |
| #define | DAC_DOR2(dac) MMIO32((dac) + 0x30) |
| DAC channel2 data output register (DAC_DOR2) More... | |
| #define | DAC_SR(dac) MMIO32((dac) + 0x34) |
| DAC status register. More... | |
| #define | DAC_CCR(dac) MMIO32((dac) + 0x38) |
| DAC calibration control register (DAC_CCR) More... | |
| #define | DAC_MCR(dac) MMIO32((dac) + 0x3C) |
| DAC mode control register (DAC_MCR) More... | |
| #define | DAC_SHSR1(dac) MMIO32((dac) + 0x40) |
| DAC channel1 sample and hold sample time register (DAC_SHSR1) More... | |
| #define | DAC_SHSR2(dac) MMIO32((dac) + 0x44) |
| DAC channel2 sample and hold sample time register (DAC_SHSR2) More... | |
| #define | DAC_SHHR(dac) MMIO32((dac) + 0x48) |
| DAC sample and hold time register (DAC_SHHR) More... | |
| #define | DAC_SHRR(dac) MMIO32((dac) + 0x4C) |
| DAC sample and hold refresh time register (DAC_SHRR) More... | |
| #define | DAC_STR1(dac) MMIO32((dac) + 0x58) |
| DAC channel1 sawtooth register (DAC_STR1) More... | |
| #define | DAC_STR2(dac) MMIO32((dac) + 0x5C) |
| DAC channel2 sawtooth register (DAC_STR2) More... | |
| #define | DAC_STMODR(dac) MMIO32((dac) + 0x60) |
| DAC sawtooth mode register (DAC_STMODR) More... | |
Detailed Description
Macro Definition Documentation
◆ DAC_CCR
| #define DAC_CCR | ( | dac | ) | MMIO32((dac) + 0x38) |
DAC calibration control register (DAC_CCR)
Definition at line 45 of file dac_common_v2.h.
◆ DAC_CR
| #define DAC_CR | ( | dac | ) | MMIO32((dac) + 0x00) |
DAC control register (DAC_CR)
Definition at line 46 of file dac_common_all.h.
◆ DAC_DHR12L1
| #define DAC_DHR12L1 | ( | dac | ) | MMIO32((dac) + 0x0C) |
DAC channel1 12-bit left aligned data holding register (DAC_DHR12L1)
Definition at line 55 of file dac_common_all.h.
◆ DAC_DHR12L2
| #define DAC_DHR12L2 | ( | dac | ) | MMIO32((dac) + 0x18) |
DAC channel2 12-bit left aligned data holding register (DAC_DHR12L2)
Definition at line 64 of file dac_common_all.h.
◆ DAC_DHR12LD
| #define DAC_DHR12LD | ( | dac | ) | MMIO32((dac) + 0x24) |
DUAL DAC 12-bit left aligned data holding register (DAC_DHR12LD)
Definition at line 73 of file dac_common_all.h.
◆ DAC_DHR12R1
| #define DAC_DHR12R1 | ( | dac | ) | MMIO32((dac) + 0x08) |
DAC channel1 12-bit right-aligned data holding register (DAC_DHR12R1)
Definition at line 52 of file dac_common_all.h.
◆ DAC_DHR12R2
| #define DAC_DHR12R2 | ( | dac | ) | MMIO32((dac) + 0x14) |
DAC channel2 12-bit right aligned data holding register (DAC_DHR12R2)
Definition at line 61 of file dac_common_all.h.
◆ DAC_DHR12RD
| #define DAC_DHR12RD | ( | dac | ) | MMIO32((dac) + 0x20) |
Dual DAC 12-bit right-aligned data holding register (DAC_DHR12RD)
Definition at line 70 of file dac_common_all.h.
◆ DAC_DHR8R1
| #define DAC_DHR8R1 | ( | dac | ) | MMIO32((dac) + 0x10) |
DAC channel1 8-bit right aligned data holding register (DAC_DHR8R1)
Definition at line 58 of file dac_common_all.h.
◆ DAC_DHR8R2
| #define DAC_DHR8R2 | ( | dac | ) | MMIO32((dac) + 0x1C) |
DAC channel2 8-bit right-aligned data holding register (DAC_DHR8R2)
Definition at line 67 of file dac_common_all.h.
◆ DAC_DHR8RD
| #define DAC_DHR8RD | ( | dac | ) | MMIO32((dac) + 0x28) |
DUAL DAC 8-bit right aligned data holding register (DAC_DHR8RD)
Definition at line 76 of file dac_common_all.h.
◆ DAC_DOR1
| #define DAC_DOR1 | ( | dac | ) | MMIO32((dac) + 0x2C) |
DAC channel1 data output register (DAC_DOR1)
Definition at line 79 of file dac_common_all.h.
◆ DAC_DOR2
| #define DAC_DOR2 | ( | dac | ) | MMIO32((dac) + 0x30) |
DAC channel2 data output register (DAC_DOR2)
Definition at line 82 of file dac_common_all.h.
◆ DAC_MCR
| #define DAC_MCR | ( | dac | ) | MMIO32((dac) + 0x3C) |
DAC mode control register (DAC_MCR)
Definition at line 48 of file dac_common_v2.h.
◆ DAC_SHHR
| #define DAC_SHHR | ( | dac | ) | MMIO32((dac) + 0x48) |
DAC sample and hold time register (DAC_SHHR)
Definition at line 57 of file dac_common_v2.h.
◆ DAC_SHRR
| #define DAC_SHRR | ( | dac | ) | MMIO32((dac) + 0x4C) |
DAC sample and hold refresh time register (DAC_SHRR)
Definition at line 60 of file dac_common_v2.h.
◆ DAC_SHSR1
| #define DAC_SHSR1 | ( | dac | ) | MMIO32((dac) + 0x40) |
DAC channel1 sample and hold sample time register (DAC_SHSR1)
Definition at line 51 of file dac_common_v2.h.
◆ DAC_SHSR2
| #define DAC_SHSR2 | ( | dac | ) | MMIO32((dac) + 0x44) |
DAC channel2 sample and hold sample time register (DAC_SHSR2)
Definition at line 54 of file dac_common_v2.h.
◆ DAC_SR
| #define DAC_SR | ( | dac | ) | MMIO32((dac) + 0x34) |
◆ DAC_STMODR
| #define DAC_STMODR | ( | dac | ) | MMIO32((dac) + 0x60) |
DAC sawtooth mode register (DAC_STMODR)
Definition at line 69 of file dac_common_v2.h.
◆ DAC_STR1
| #define DAC_STR1 | ( | dac | ) | MMIO32((dac) + 0x58) |
DAC channel1 sawtooth register (DAC_STR1)
Definition at line 63 of file dac_common_v2.h.
◆ DAC_STR2
| #define DAC_STR2 | ( | dac | ) | MMIO32((dac) + 0x5C) |
DAC channel2 sawtooth register (DAC_STR2)
Definition at line 66 of file dac_common_v2.h.
◆ DAC_SWTRIGR
| #define DAC_SWTRIGR | ( | dac | ) | MMIO32((dac) + 0x04) |
DAC software trigger register (DAC_SWTRIGR)
Definition at line 49 of file dac_common_all.h.
