libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
fdcan.h File Reference
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Data Structures

struct  fdcan_standard_filter
 Structure describing standard ID filter. More...
 
struct  fdcan_extended_filter
 Structure describing extended ID filters. More...
 
struct  fdcan_rx_fifo_element
 Structure describing receive FIFO element. More...
 
struct  fdcan_tx_event_element
 Structure describing transmit event element. More...
 
struct  fdcan_tx_buffer_element
 Structure describing transmit buffer element. More...
 

Macros

#define FDCAN_FIFO0   0
 
#define FDCAN_FIFO1   1
 
#define FDCAN_BLOCK_ID(can_base)   (((can_base) - CAN1)/(CAN2 - CAN1))
 
#define FDCAN_CREL(can_base)   MMIO32(can_base + 0x0000)
 
#define FDCAN_ENDN(can_base)   MMIO32(can_base + 0x0004)
 
#define FDCAN_DBTP(can_base)   MMIO32(can_base + 0x000C)
 
#define FDCAN_TEST(can_base)   MMIO32(can_base + 0x0010)
 
#define FDCAN_RWD(can_base)   MMIO32(can_base + 0x0014)
 
#define FDCAN_CCCR(can_base)   MMIO32(can_base + 0x0018)
 
#define FDCAN_NBTP(can_base)   MMIO32(can_base + 0x001C)
 
#define FDCAN_TSCC(can_base)   MMIO32(can_base + 0x0020)
 
#define FDCAN_TSCV(can_base)   MMIO32(can_base + 0x0024)
 
#define FDCAN_TOCC(can_base)   MMIO32(can_base + 0x0028)
 
#define FDCAN_TOCV(can_base)   MMIO32(can_base + 0x002C)
 
#define FDCAN_ECR(can_base)   MMIO32(can_base + 0x0040)
 
#define FDCAN_PSR(can_base)   MMIO32(can_base + 0x0044)
 
#define FDCAN_TDCR(can_base)   MMIO32(can_base + 0x0048)
 
#define FDCAN_IR(can_base)   MMIO32(can_base + 0x0050)
 
#define FDCAN_IE(can_base)   MMIO32(can_base + 0x0054)
 
#define FDCAN_ILS(can_base)   MMIO32(can_base + 0x0058)
 
#define FDCAN_ILE(can_base)   MMIO32(can_base + 0x005C)
 
#define FDCAN_RXFIS(can_base, fifo_id)    MMIO32(can_base + FDCAN_RXFIS_BASE + (FDCAN_RXFI_OFFSET * fifo_id))
 Generic access to Rx FIFO status registers. More...
 
#define FDCAN_RXF0S(can_base)   FDCAN_RXFIS(can_base, 0)
 
#define FDCAN_RXF1S(can_base)   FDCAN_RXFIS(can_base, 1)
 
#define FDCAN_RXFIA(can_base, fifo_id)    MMIO32(can_base + FDCAN_RXFIA_BASE + (FDCAN_RXFI_OFFSET * fifo_id))
 Generic access to Rx FIFO acknowledge registers. More...
 
#define FDCAN_RXF0A(can_base)   FDCAN_RXFIA(can_base, 0)
 
#define FDCAN_RXF1A(can_base)   FDCAN_RXFIA(can_base, 1)
 
#define FDCAN_TXBC(can_base)   MMIO32(can_base + 0x00C0)
 
#define FDCAN_TXFQS(can_base)   MMIO32(can_base + 0x00C4)
 
#define FDCAN_CREL_DAY_SHIFT   0
 DAY[7:0]: FDCAN core revision date. More...
 
#define FDCAN_CREL_DAY_MASK   0xFF
 
#define FDCAN_CREL_MON_SHIFT   8
 MON[7:0]: FDCAN core revision month. More...
 
#define FDCAN_CREL_MON_MASK   0xFF
 
#define FDCAN_CREL_YEAR_SHIFT   16
 YEAR[3:0]: FDCAN core revision year. More...
 
#define FDCAN_CREL_YEAR_MASK   0xF
 
#define FDCAN_CREL_SUBSTEP_SHIFT   20
 SUBSTEP[3:0]: FDCAN core release sub stepping. More...
 
#define FDCAN_CREL_SUBSTEP_MASK   0xF
 
#define FDCAN_CREL_STEP_SHIFT   24
 STEP[3:0]: FDCAN core release stepping. More...
 
#define FDCAN_CREL_STEP_MASK   0xF
 
#define FDCAN_CREL_REL_SHIFT   28
 REL[3:0]: FDCAN core release number. More...
 
#define FDCAN_CREL_REL_MASK   0xF
 
#define FDCAN_DBTP_DSJW_SHIFT   0
 DSJW[3:0]: Synchronization jump width. More...
 
#define FDCAN_DBTP_DSJW_MASK   0xF
 
#define FDCAN_DBTP_DTSEG2_SHIFT   4
 DTSEG2[3:0]: Data time segment after sample point. More...
 
#define FDCAN_DBTP_DTSEG2_MASK   0xF
 
#define FDCAN_DBTP_DTSEG1_SHIFT   8
 DTSEG1[4:0]: Data time segment before sample point. More...
 
#define FDCAN_DBTP_DTSEG1_MASK   0x1F
 
#define FDCAN_DBTP_DBRP_SHIFT   16
 DBRP[4:0]: Data bit rate prescaler. More...
 
#define FDCAN_DBTP_DBRP_MASK   0x1F
 
#define FDCAN_DBTP_TDC   (1 << 23)
 
#define FDCAN_TEST_LBCK   (1 << 4)
 
#define FDCAN_TEST_TX_SHIFT   5
 TX[1:0]: Control of transmit pin. More...
 
#define FDCAN_TEST_TX_MASK   0x3
 
#define FDCAN_TEST_RX   (1 << 7)
 
#define FDCAN_RWD_WDC_SHIFT   0
 WDC[7:0]: RAM watchdog configuration. More...
 
#define FDCAN_RWD_WDC_MASK   0xFF
 
#define FDCAN_RWD_WDV_SHIFT   7
 WDV[7:0]: RAM watchdog actual value. More...
 
#define FDCAN_RWD_WDV_MASK   0xFF
 
#define FDCAN_CCCR_INIT   (1 << 0)
 
#define FDCAN_CCCR_CCE   (1 << 1)
 
#define FDCAN_CCCR_ASM   (1 << 2)
 
#define FDCAN_CCCR_CSA   (1 << 3)
 
#define FDCAN_CCCR_CSR   (1 << 4)
 
#define FDCAN_CCCR_MON   (1 << 5)
 
#define FDCAN_CCCR_DAR   (1 << 6)
 
#define FDCAN_CCCR_TEST   (1 << 7)
 
#define FDCAN_CCCR_FDOE   (1 << 8)
 
#define FDCAN_CCCR_BRSE   (1 << 9)
 
#define FDCAN_CCCR_PXHD   (1 << 12)
 
#define FDCAN_CCCR_EFBI   (1 << 13)
 
#define FDCAN_CCCR_TXP   (1 << 14)
 
#define FDCAN_CCCR_NISO   (1 << 15)
 
#define FDCAN_CCCR_INIT_TIMEOUT   0x0000FFFF
 Timeout for FDCAN_CCCR register INIT bit to accept set value. More...
 
#define FDCAN_NBTP_NTSEG2_SHIFT   0
 NTSEG2[6:0]: Nominal timing segment after sample point length. More...
 
#define FDCAN_NBTP_NTSEG2_MASK   0x7F
 
#define FDCAN_NBTP_NTSEG1_SHIFT   8
 NTSEG1[7:0]: Nominal timing segment before sample point length. More...
 
#define FDCAN_NBTP_NTSEG1_MASK   0xFF
 
#define FDCAN_NBTP_NBRP_SHIFT   16
 NBRP[8:0]: Norminal timing bit rate prescaler. More...
 
#define FDCAN_NBTP_NBRP_MASK   0x1FF
 
#define FDCAN_NBTP_NSJW_SHIFT   25
 NSJW[6:0]: Norminal timing resynchronization jumb width. More...
 
#define FDCAN_NBTP_NSJW_MASK   0x7F
 
#define FDCAN_TSCC_TSS_SHIFT   0
 TSS[1:0]: Timestamp select. More...
 
#define FDCAN_TSCC_TSS_MASK   0x3
 
#define FDCAN_TSCC_TCP_SHIFT   16
 TCP[3:0]: Timestamp counter prescaler. More...
 
#define FDCAN_TSCC_TCP_MASK   0xF
 
#define FDCAN_TSCV_TSC_SHIFT   0
 TSC[15:0]: Timestamp counter value. More...
 
#define FDCAN_TSCV_TSC_MASK   0xFFFF
 
#define FDCAN_TOCC_ETOC   (1 << 0)
 
#define FDCAN_TOCC_TOS_SHIFT   1
 TOS[1:0]: Timeout select. More...
 
#define FDCAN_TOCC_TOS_MASK   0x3
 
#define FDCAN_TOCC_TOP_SHIFT   16
 TOP[15:0]: Timeout period. More...
 
#define FDCAN_TOCC_TOP_MASK   0xFFFF
 
#define FDCAN_TOCV_TOC_SHIFT   0
 TOC[15:0]: Timeout counter. More...
 
#define FDCAN_TOCV_TOC_MASK   0xFFFF
 
#define FDCAN_ECR_TEC_SHIFT   0
 TEC[7:0]: Transmit error counter. More...
 
#define FDCAN_ECR_TEC_MASK   0xFF
 
#define FDCAN_ECR_REC_SHIFT   8
 REC[6:0]: Receive error counter. More...
 
#define FDCAN_ECR_REC_MASK   0x7F
 
#define FDCAN_ECR_RP   (1 << 15)
 
#define FDCAN_ECR_CEL_SHIFT   16
 CEL[7:0]: CAN error logging. More...
 
#define FDCAN_ECR_CEL_MASK   0xFF
 
#define FDCAN_PSR_LEC_SHIFT   0
 LEC[2:0]: Last error code. More...
 
#define FDCAN_PSR_LEC_MASK   0x7
 
#define FDCAN_PSR_ACT_SHIFT   3
 ACT[1:0]: CAN block activity. More...
 
#define FDCAN_PSR_ACT_MASK   0x3
 
#define FDCAN_PSR_EP   (1 << 5)
 
#define FDCAN_PSR_EW   (1 << 6)
 
#define FDCAN_PSR_BO   (1 << 7)
 
#define FDCAN_PSR_DLEC_SHIFT   8
 DLEC[2:0]: Last error code in data section. More...
 
#define FDCAN_PSR_DLEC_MASK   0x7
 
#define FDCAN_PSR_RESI   (1 << 11)
 
#define FDCAN_PSR_RBRSRESI1   (1 << 12)
 
#define FDCAN_PSR_REDL   (1 << 13)
 
#define FDCAN_PSR_PXE   (1 << 14)
 
#define FDCAN_PSR_TDCV_SHIFT   16
 TDCV[6:0]: Transmitter delay compensation value. More...
 
#define FDCAN_PSR_TDCV_MASK   0x7F
 
#define FDCAN_TDCR_TDCF_SHIFT   0
 TDCF[6:0]: Transmitter delay compensation filter window length. More...
 
#define FDCAN_TDCR_TDCF_MASK   0x7F
 
#define FDCAN_TDCR_TDCO_SHIFT   8
 TDCO[6:0]: Transmitter delay compensation offset. More...
 
#define FDCAN_TDCR_TDCO_MASK   0x7F
 
#define FDCAN_IR_RF0N   (1 << 0)
 
#define FDCAN_IR_RF0F   (1 << 1)
 
#define FDCAN_IR_RF0L   (1 << 2)
 
#define FDCAN_IR_RF1N   (1 << 3)
 
#define FDCAN_IR_RF1F   (1 << 4)
 
#define FDCAN_IR_RF1L   (1 << 5)
 
#define FDCAN_IR_HPM   (1 << 6)
 
#define FDCAN_IR_TC   (1 << 7)
 
#define FDCAN_IR_TCF   (1 << 8)
 
#define FDCAN_IR_TFE   (1 << 9)
 
#define FDCAN_IR_TEFN   (1 << 10)
 
#define FDCAN_IR_TEFF   (1 << 11)
 
#define FDCAN_IR_TEFL   (1 << 12)
 
#define FDCAN_IR_TSW   (1 << 13)
 
#define FDCAN_IR_MRAF   (1 << 14)
 
#define FDCAN_IR_TOO   (1 << 15)
 
#define FDCAN_IR_ELO   (1 << 16)
 
#define FDCAN_IR_EP   (1 << 17)
 
#define FDCAN_IR_EW   (1 << 18)
 
#define FDCAN_IR_BO   (1 << 19)
 
#define FDCAN_IR_WDI   (1 << 20)
 
#define FDCAN_IR_PEA   (1 << 21)
 
#define FDCAN_IR_PED   (1 << 22)
 
#define FDCAN_IR_ARA   (1 << 23)
 
#define FDCAN_IE_RF0NE   (1 << 0)
 
#define FDCAN_IE_RF0FE   (1 << 1)
 
#define FDCAN_IE_RF0LE   (1 << 2)
 
#define FDCAN_IE_RF1NE   (1 << 3)
 
#define FDCAN_IE_RF1FE   (1 << 4)
 
#define FDCAN_IE_RF1LE   (1 << 5)
 
#define FDCAN_IE_HPME   (1 << 6)
 
#define FDCAN_IE_TCE   (1 << 7)
 
#define FDCAN_IE_TCFE   (1 << 8)
 
#define FDCAN_IE_TFEE   (1 << 9)
 
#define FDCAN_IE_TEFNE   (1 << 10)
 
#define FDCAN_IE_TEFFE   (1 << 11)
 
#define FDCAN_IE_TEFLE   (1 << 12)
 
#define FDCAN_IE_TSWE   (1 << 13)
 
#define FDCAN_IE_MRAFE   (1 << 14)
 
#define FDCAN_IE_TOOE   (1 << 15)
 
#define FDCAN_IE_ELOE   (1 << 16)
 
#define FDCAN_IE_EPE   (1 << 17)
 
#define FDCAN_IE_EWE   (1 << 18)
 
#define FDCAN_IE_BOE   (1 << 19)
 
#define FDCAN_IE_WDIE   (1 << 20)
 
#define FDCAN_IE_PEAE   (1 << 21)
 
#define FDCAN_IE_PEDE   (1 << 22)
 
#define FDCAN_IE_ARAE   (1 << 23)
 
#define FDCAN_ILS_RxFIFO0   (1 << 0)
 
#define FDCAN_ILS_RxFIFO1   (1 << 1)
 
#define FDCAN_ILS_SMSG   (1 << 2)
 
#define FDCAN_ILS_TFERR   (1 << 3)
 
#define FDCAN_ILS_MISC   (1 << 4)
 
#define FDCAN_ILS_BERR   (1 << 5)
 
#define FDCAN_ILS_PERR   (1 << 6)
 
#define FDCAN_ILE_INT0   (1 << 0)
 
#define FDCAN_ILE_INT1   (1 << 1)
 
#define FDCAN_XIDAM_EIDM_SHIFT   0
 EIDM[28:0]: Extended ID mask for filtering. More...
 
#define FDCAN_XIDAM_EIDM_MASK   0x1FFFFFFF
 
#define FDCAN_HPMS_BIDX_SHIFT   0
 BIDX[2:0]: Buffer index. More...
 
#define FDCAN_HPMS_BIDX_MASK   0x7
 
#define FDCAN_HPMS_MSI_SHIFT   6
 MSI[1:0]: Message storage indicator. More...
 
#define FDCAN_HPMS_MSI_MASK   0x3
 
#define FDCAN_HPMS_FIDX_SHIFT   8
 FIDX[4:0]: Filter index. More...
 
#define FDCAN_HPMS_FIDX_MASK   0x1F
 
#define FDCAN_HPMS_FLS   (1 << 15)
 
#define FDCAN_RXFIFO_FL_SHIFT   0
 Fill level of Rx FIFOs. More...
 
#define FDCAN_RXFIFO_GI_SHIFT   8
 Get index of Rx FIFOs. More...
 
#define FDCAN_RXFIFO_PI_SHIFT   16
 Put index of Rx FIFOs. More...
 
#define FDCAN_RXFIFO_FF   (1 << 24)
 
#define FDCAN_RXFIFO_RFL   (1 << 25)
 
#define FDCAN_RXF0S_F0FL_SHIFT   FDCAN_RXFIFO_FL_SHIFT
 F0FL[3:0]: Fill level of Rx FIFO 0. More...
 
#define FDCAN_RXF0S_F0FL_MASK   FDCAN_RXFIFO_FL_MASK
 
#define FDCAN_RXF0S_F0GI_SHIFT   FDCAN_RXFIFO_GI_SHIFT
 F0GI[1:0]: Get index of Rx FIFO 0. More...
 
#define FDCAN_RXF0S_F0GI_MASK   FDCAN_RXFIFO_GI_MASK
 
#define FDCAN_RXF0S_F0PI_SHIFT   FDCAN_RXFIFO_PI_SHIFT
 F0PI[1:0]: Put index of Rx FIFO 0. More...
 
#define FDCAN_RXF0S_F0PI_MASK   FDCAN_RXFIFO_PI_MASK
 
#define FDCAN_RXF0S_F0F   FDCAN_RXFIFO_FF
 
#define FDCAN_RXF0S_RF0L   FDCAN_RXFIFO_RFL
 
#define FDCAN_RXFIFO_AI_SHIFT   0
 Rx FIFOs acknowledge index. More...
 
#define FDCAN_RXF0A_R0AI_SHIFT   FDCAN_RXFIFO_AI_SHIFT
 R0AI[2:0]: Rx FIFO 0 acknowledge index. More...
 
#define FDCAN_RXF0A_R0AI_MASK   FDCAN_RXFIFO_AI_MASK
 
#define FDCAN_RXF1S_F1FL_SHIFT   FDCAN_RXFIFO_FL_SHIFT
 F1FL[3:1]: Fill level of Rx FIFO 1. More...
 
#define FDCAN_RXF1S_F1FL_MASK   FDCAN_RXFIFO_FL_MASK
 
#define FDCAN_RXF1S_F1GI_SHIFT   FDCAN_RXFIFO_GI_SHIFT
 F1GI[1:1]: Get index of Rx FIFO 1. More...
 
#define FDCAN_RXF1S_F1GI_MASK   FDCAN_RXFIFO_GI_MASK
 
#define FDCAN_RXF1S_F1PI_SHIFT   FDCAN_RXFIFO_PI_SHIFT
 F1PI[1:1]: Put index of Rx FIFO 1. More...
 
#define FDCAN_RXF1S_F1PI_MASK   FDCAN_RXFIFO_PI_MASK
 
#define FDCAN_RXF1S_F1F   FDCAN_RXFIFO_FF
 
#define FDCAN_RXF1S_RF1L   FDCAN_RXFIFO_RFL
 
#define FDCAN_RXF1A_R1AI_SHIFT   FDCAN_RXFIFO_AI_SHIFT
 R1AI[2:0]: Rx FIFO 1 acknowledge index. More...
 
#define FDCAN_RXF1A_R1AI_MASK   FDCAN_RXFIFO_AI_MASK
 
#define FDCAN_TXBC_TFQM   (1 << 24)
 
#define FDCAN_TXFQS_TFFL_SHIFT   0
 TFFL[2:0]: Tx FIFO free level. More...
 
#define FDCAN_TXFQS_TFGI_SHIFT   8
 TFGI[1:0]: Tx FIFO get index. More...
 
#define FDCAN_TXFQS_TFQPI_SHIFT   16
 TFQPI[1:0]: Tx FIFO put index. More...
 
#define FDCAN_TXFQS_TFQF   (1 << 21)
 
#define FDCAN_TXBRP_TRP0   (1 << 0)
 
#define FDCAN_TXBRP_TRP1   (1 << 1)
 
#define FDCAN_TXBRP_TRP2   (1 << 2)
 
#define FDCAN_TXBAR_AR0   (1 << 0)
 
#define FDCAN_TXBAR_AR1   (1 << 1)
 
#define FDCAN_TXBAR_AR2   (1 << 2)
 
#define FDCAN_TXBCR_CR0   (1 << 0)
 
#define FDCAN_TXBCR_CR1   (1 << 1)
 
#define FDCAN_TXBCR_CR2   (1 << 2)
 
#define FDCAN_TXBTO_TO0   (1 << 0)
 
#define FDCAN_TXBTO_TO1   (1 << 1)
 
#define FDCAN_TXBTO_TO2   (1 << 2)
 
#define FDCAN_TXBCF_CF0   (1 << 0)
 
#define FDCAN_TXBCF_CF1   (1 << 1)
 
#define FDCAN_TXBCF_CF2   (1 << 2)
 
#define FDCAN_TXBTIE_TIE0   (1 << 0)
 
#define FDCAN_TXBTIE_TIE1   (1 << 1)
 
#define FDCAN_TXBTIE_TIE2   (1 << 2)
 
#define FDCAN_TXBCIE_CFIE0   (1 << 0)
 
#define FDCAN_TXBCIE_CFIE1   (1 << 1)
 
#define FDCAN_TXBCIE_CFIE2   (1 << 2)
 
#define FDCAN_TXEFS_EFFL_SHIFT   0
 EFFL[2:0]: Event FIFO fill level. More...
 
#define FDCAN_TXEFS_EFGI_SHIFT   8
 EFG[1:0]: Event FIFO get index. More...
 
#define FDCAN_TXEFS_EFPI_SHIFT   16
 EFPI[1:0]: Event FIFO put index. More...
 
#define FDCAN_TXEFS_EFF   (1 << 24)
 
#define FDCAN_TXEFS_TEF   (1 << 25)
 
#define FDCAN_TXEFA_EFAI_SHIFT   0
 EFAI[1:0]: Event FIFO acknowledge index. More...
 
#define FDCAN_TXEFA_EFAI_MASK   0x3
 
#define FDCAN_SFT_SHIFT   30
 
#define FDCAN_SFT_MASK   0x3
 
#define FDCAN_SFT_RANGE   0x0
 Filter matches all messages in range from id1 to id2. More...
 
#define FDCAN_SFT_DUAL   0x1
 Filter matches messages with id1 or id2. More...
 
#define FDCAN_SFT_ID_MASK   0x2
 Filter matches messages which match id1 after being unmasked using id2. More...
 
#define FDCAN_SFT_DISABLE   0x3
 Disable this filter. More...
 
#define FDCAN_SFEC_SHIFT   27
 
#define FDCAN_SFEC_MASK   0x7
 
#define FDCAN_SFEC_DISABLE   0x0
 Filter is disabled. More...
 
#define FDCAN_SFEC_FIFO0   0x1
 Put message into FIFO0. More...
 
#define FDCAN_SFEC_FIFO1   0x2
 Put message into FIFO1. More...
 
#define FDCAN_SFEC_REJECT   0x3
 Reject message. More...
 
#define FDCAN_SFEC_PRIO   0x4
 Treat message as priority message (and continue processing further rules) More...
 
#define FDCAN_SFEC_PRIO_FIFO0   0x5
 Treat message as priority and put it into FIFO0. More...
 
#define FDCAN_SFEC_PRIO_FIFO1   0x6
 Treat message as priority and put it into FIFO1. More...
 
#define FDCAN_SFID1_SHIFT   16
 
#define FDCAN_SFID1_MASK   0x7FF
 
#define FDCAN_SFID2_SHIFT   0
 
#define FDCAN_SFID2_MASK   0x7FF
 
#define FDCAN_EFEC_SHIFT   29
 
#define FDCAN_EFEC_MASK   0x7
 
#define FDCAN_EFEC_DISABLE   0x0
 Disable this filter. More...
 
#define FDCAN_EFEC_FIFO0   0x1
 Put message into FIFO0. More...
 
#define FDCAN_EFEC_FIFO1   0x2
 Put message into FIFO1. More...
 
#define FDCAN_EFEC_REJECT   0x3
 Reject message. More...
 
#define FDCAN_EFEC_PRIO   0x4
 Treat message as priority message (and continue processing further rules) More...
 
#define FDCAN_EFEC_PRIO_FIFO0   0x5
 Treat message as priority and put it into FIFO0. More...
 
#define FDCAN_EFEC_PRIO_FIFO1   0x6
 Treat message as priority and put it into FIFO1. More...
 
#define FDCAN_EFID1_SHIFT   0
 
#define FDCAN_EFID1_MASK   0x1FFFFFFF
 
#define FDCAN_EFT_SHIFT   30
 
#define FDCAN_EFT_MASK   0x3
 
#define FDCAN_EFT_RANGE   0x0
 Filter matches all messages in range from id1 to id2. More...
 
#define FDCAN_EFT_DUAL   0x1
 Filter matches messages with id1 or id2. More...
 
#define FDCAN_EFT_ID_MASK   0x2
 Filter matches messages which match id1 after being unmasked using id2. More...
 
#define FDCAN_EFT_RANGE_NOXIDAM   0x3
 Similar to FDCAN_EFT_RANGE except of ignoring global mask set using FDCAN_XIDAM register. More...
 
#define FDCAN_EFID2_SHIFT   0
 
#define FDCAN_EFID2_MASK   0x1FFFFFFF
 
#define FDCAN_FIFO_ESI   (1 << 31)
 
#define FDCAN_FIFO_XTD   (1 << 30)
 
#define FDCAN_FIFO_RTR   (1 << 29)
 
#define FDCAN_FIFO_EFC   (1 << 23)
 
#define FDCAN_FIFO_FDF   (1 << 21)
 
#define FDCAN_FIFO_BRS   (1 << 20)
 
#define FDCAN_FIFO_EID_SHIFT   0
 
#define FDCAN_FIFO_EID_MASK   0x1FFFFFFF
 
#define FDCAN_FIFO_SID_SHIFT   18
 
#define FDCAN_FIFO_SID_MASK   0x7FF
 
#define FDCAN_FIFO_DLC_SHIFT   16
 
#define FDCAN_FIFO_DLC_MASK   0xF
 
#define FDCAN_FIFO_MM_SHIFT   24
 
#define FDCAN_FIFO_MM_MASK   0xFF
 
#define FDCAN_FIFO_ANMF   (1 << 31)
 
#define FDCAN_FIFO_FIDX_SHIFT   24
 
#define FDCAN_FIFO_FIDX_MASK   0x7F
 
#define FDCAN_FIFO_RXTS_SHIFT   0
 
#define FDCAN_FIFO_RXTS_MASK   0xFFFF
 
#define FDCAN_E_OK   0
 No error. More...
 
#define FDCAN_E_OUTOFRANGE   -1
 Value provided was out of range. More...
 
#define FDCAN_E_TIMEOUT   -2
 Timeout waiting for FDCAN block to accept INIT bit change. More...
 
#define FDCAN_E_INVALID   -3
 Value provided was invalid (FIFO index, FDCAN block base address, length, etc.) More...
 
#define FDCAN_E_BUSY   -4
 Device is busy: Transmit buffer is full, unable to queue additional message or device is outside of INIT mode and cannot perform desired operation. More...
 
#define FDCAN_E_NOTAVAIL   -5
 Receive buffer is empty, unable to read any new message. More...
 

Functions

int fdcan_init (uint32_t canport, uint32_t timeout)
 Put FDCAN block into INIT mode for setup. More...
 
void fdcan_set_can (uint32_t canport, bool auto_retry_disable, bool rx_fifo_locked, bool tx_queue_mode, bool silent, uint32_t n_sjw, uint32_t n_ts1, uint32_t n_ts2, uint32_t n_br_presc)
 Set essential FDCAN block parameters for plain CAN operation. More...
 
void fdcan_set_fdcan (uint32_t canport, bool brs_enable, bool fd_op_enable, uint32_t f_sjw, uint32_t f_ts1, uint32_t f_ts2, uint32_t f_br_presc)
 Set FDCAN block parameters for FDCAN transmission. More...
 
void fdcan_set_test (uint32_t canport, bool testing, bool loopback)
 Set FDCAN block testing features. More...
 
void fdcan_init_filter (uint32_t canport, uint8_t std_filt, uint8_t ext_filt)
 Configure amount of filters and initialize filtering block. More...
 
int fdcan_start (uint32_t canport, uint32_t timeout)
 Enable FDCAN operation after FDCAN block has been set up. More...
 
int fdcan_get_init_state (uint32_t canport)
 Return current FDCAN block operation state. More...
 
void fdcan_set_std_filter (uint32_t canport, uint32_t nr, uint8_t id_list_mode, uint32_t id1, uint32_t id2, uint8_t action)
 Configure filter rule for standard ID frames. More...
 
void fdcan_set_ext_filter (uint32_t canport, uint32_t nr, uint8_t id_list_mode, uint32_t id1, uint32_t id2, uint8_t action)
 Configure filter rule for extended ID frames. More...
 
void fdcan_enable_irq (uint32_t canport, uint32_t irq)
 Enable IRQ from FDCAN block. More...
 
void fdcan_disable_irq (uint32_t canport, uint32_t irq)
 Disable IRQ from FDCAN block. More...
 
int fdcan_transmit (uint32_t canport, uint32_t id, bool ext, bool rtr, bool fdcan_fmt, bool btr_switch, uint8_t length, const uint8_t *data)
 Transmit Message using FDCAN. More...
 
int fdcan_receive (uint32_t canport, uint8_t fifo, bool release, uint32_t *id, bool *ext, bool *rtr, uint8_t *fmi, uint8_t *length, uint8_t *data, uint16_t *timestamp)
 Receive Message from FDCAN FIFO. More...
 
void fdcan_release_fifo (uint32_t canport, uint8_t fifo)
 Release receive oldest FIFO entry. More...
 
bool fdcan_available_tx (uint32_t canport)
 Check if there is free transmit buffer. More...
 
bool fdcan_available_rx (uint32_t canport, uint8_t fifo)
 Tell if there is message waiting in receive FIFO. More...
 
int fdcan_cccr_init_cfg (uint32_t canport, bool set, uint32_t timeout)
 Routine implementing FDCAN_CCCR's INIT bit manipulation. More...
 
struct fdcan_standard_filterfdcan_get_flssa_addr (uint32_t canport)
 Returns standard filter start address in message RAM. More...
 
struct fdcan_extended_filterfdcan_get_flesa_addr (uint32_t canport)
 Returns extended filter start address in message RAM. More...
 
struct fdcan_rx_fifo_elementfdcan_get_rxfifo_addr (uint32_t canport, unsigned fifo_id, unsigned element_id)
 Returns a pointer to an RX FIFO element in message RAM. More...
 
unsigned fdcan_get_fifo_element_size (uint32_t canport, unsigned fifo_id)
 Returns actual size of FIFO entry in FIFO for given CAN port and FIFO. More...
 
struct fdcan_tx_event_elementfdcan_get_txevt_addr (uint32_t canport)
 Returns transmit event start address in message RAM. More...
 
struct fdcan_tx_buffer_elementfdcan_get_txbuf_addr (uint32_t canport, unsigned element_id)
 Returns a pointer to an TX FIFO element in message RAM. More...
 
unsigned fdcan_get_txbuf_element_size (uint32_t canport)
 Returns actual size of transmit entry in transmit queue/FIFO for given CAN port. More...
 
void fdcan_set_fifo_locked_mode (uint32_t canport, bool locked)
 Configure FDCAN FIFO lock mode. More...
 
uint32_t fdcan_length_to_dlc (uint8_t length)
 Converts frame length to DLC value. More...
 
uint8_t fdcan_dlc_to_length (uint32_t dlc)
 Converts DLC value into frame payload length. More...
 

Function Documentation

◆ fdcan_available_rx()

bool fdcan_available_rx ( uint32_t  canport,
uint8_t  fifo 
)

Tell if there is message waiting in receive FIFO.

Parameters
[in]canportFDCAN port. See FDCAN block base addresses.
[in]fifoRx FIFO number, 0 or 1
Returns
true if there is at least one message waiting in given receive FIFO, false otherwise.

Definition at line 687 of file fdcan_common.c.

References FDCAN_RXFIFO_FL_MASK, FDCAN_RXFIFO_FL_SHIFT, and FDCAN_RXFIS.

◆ fdcan_available_tx()

bool fdcan_available_tx ( uint32_t  canport)

Check if there is free transmit buffer.

Parameters
[in]canportFDCAN port. See FDCAN block base addresses.
Returns
true if there is at least one free transmit buffer for new message to be sent, false otherwise.

Definition at line 675 of file fdcan_common.c.

References FDCAN_E_BUSY, and fdcan_get_free_txbuf().

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◆ fdcan_cccr_init_cfg()

int fdcan_cccr_init_cfg ( uint32_t  canport,
bool  set,
uint32_t  timeout 
)

Routine implementing FDCAN_CCCR's INIT bit manipulation.

This routine will change INIT bit and wait for it to actually change its value. If change won't happen before timeout, error is signalized. If INIT bit already has value which should be set, this function will return immediately.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]setnew value of INIT, true means set
[in]timeoutAmount of busyloop cycles, function will wait for FDCAN to switch it's state. If set to 0, then function returns immediately.
Returns
FDCAN_E_OK on success, FDCAN_E_TIMEOUT if INIT bit value didn't change before timeout has expired.

Definition at line 41 of file fdcan_common.c.

References FDCAN_CCCR, FDCAN_CCCR_INIT, FDCAN_E_OK, and FDCAN_E_TIMEOUT.

Referenced by fdcan_init(), and fdcan_start().

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◆ fdcan_disable_irq()

void fdcan_disable_irq ( uint32_t  canport,
uint32_t  irq 
)

Disable IRQ from FDCAN block.

This routine configures FDCAN to disable certain IRQ. Each FDCAN block supports two IRQs.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]irqnumber of IRQ to be enabled (currently 0 or 1)

Definition at line 664 of file fdcan_common.c.

References FDCAN_ILE, FDCAN_ILE_INT0, and FDCAN_ILE_INT1.

◆ fdcan_dlc_to_length()

uint8_t fdcan_dlc_to_length ( uint32_t  dlc)

Converts DLC value into frame payload length.

Works for both CAN and FDCAN DLC values.

Parameters
[in]dlcDLC value
Returns
data payload length in bytes

Definition at line 221 of file fdcan_common.c.

Referenced by fdcan_get_fifo_element_size(), fdcan_get_txbuf_element_size(), and fdcan_receive().

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◆ fdcan_enable_irq()

void fdcan_enable_irq ( uint32_t  canport,
uint32_t  irq 
)

Enable IRQ from FDCAN block.

This routine configures FDCAN to enable certain IRQ. Each FDCAN block supports two IRQs.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]irqnumber of IRQ to be enabled (currently 0 or 1)

Definition at line 651 of file fdcan_common.c.

References FDCAN_ILE, FDCAN_ILE_INT0, and FDCAN_ILE_INT1.

◆ fdcan_get_flesa_addr()

struct fdcan_extended_filter * fdcan_get_flesa_addr ( uint32_t  canport)

Returns extended filter start address in message RAM.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
Returns
Base address of extended filter configuration block.

Definition at line 136 of file fdcan_common.c.

References CAN_MSG_BASE, and FDCAN_LFESA_OFFSET.

Referenced by fdcan_init_filter(), and fdcan_set_ext_filter().

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◆ fdcan_get_flssa_addr()

struct fdcan_standard_filter * fdcan_get_flssa_addr ( uint32_t  canport)

Returns standard filter start address in message RAM.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
Returns
Base address of standard filter configuration block.

Definition at line 124 of file fdcan_common.c.

References CAN_MSG_BASE, and FDCAN_LFSSA_OFFSET.

Referenced by fdcan_init_filter(), and fdcan_set_std_filter().

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◆ fdcan_get_init_state()

int fdcan_get_init_state ( uint32_t  canport)

Return current FDCAN block operation state.

This function effectively returns value of FDCAN_CCCR's INIT bit.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
Returns
1 if FDCAN block is in INIT mode, 0 if it is already started.

Definition at line 396 of file fdcan_common.c.

References FDCAN_CCCR, and FDCAN_CCCR_INIT.

◆ fdcan_get_rxfifo_addr()

struct fdcan_rx_fifo_element * fdcan_get_rxfifo_addr ( uint32_t  canport,
unsigned  fifo_id,
unsigned  element_id 
)

Returns a pointer to an RX FIFO element in message RAM.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]fifo_idID of FIFO whose address is requested
[in]element_idthe element number in the fifo we're requesting
Returns
a pointer to the individual element in the message ram

Definition at line 150 of file fdcan_common.c.

References CAN_MSG_BASE, fdcan_get_fifo_element_size(), and FDCAN_RXFIFO_OFFSET.

Referenced by fdcan_receive().

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◆ fdcan_get_txbuf_addr()

struct fdcan_tx_buffer_element * fdcan_get_txbuf_addr ( uint32_t  canport,
unsigned  element_id 
)

Returns a pointer to an TX FIFO element in message RAM.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]element_idthe element number in the fifo we're requesting
Returns
a pointer to the individual element in the message ram

Definition at line 178 of file fdcan_common.c.

References CAN_MSG_BASE, fdcan_get_txbuf_element_size(), and FDCAN_TXBUF_OFFSET.

Referenced by fdcan_transmit().

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◆ fdcan_get_txevt_addr()

struct fdcan_tx_event_element * fdcan_get_txevt_addr ( uint32_t  canport)

Returns transmit event start address in message RAM.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
Returns
Base address of transmit event block.

Definition at line 165 of file fdcan_common.c.

References CAN_MSG_BASE, and FDCAN_TXEVT_OFFSET.

◆ fdcan_length_to_dlc()

uint32_t fdcan_length_to_dlc ( uint8_t  length)

Converts frame length to DLC value.

Works for both CAN and FDCAN frame lengths. If length is invalid value, then returns 0xFF.

Parameters
[in]lengthintended frame payload length in bytes
Returns
DLC value representing lengths or 0xFF if length cannot be encoded into DLC format (applies only to FDCAN frame lengths)

Definition at line 197 of file fdcan_common.c.

Referenced by fdcan_set_rx_element_size(), fdcan_set_tx_element_size(), and fdcan_transmit().

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◆ fdcan_receive()

int fdcan_receive ( uint32_t  canport,
uint8_t  fifo_id,
bool  release,
uint32_t *  id,
bool *  ext,
bool *  rtr,
uint8_t *  fmi,
uint8_t *  length,
uint8_t *  data,
uint16_t *  timestamp 
)

Receive Message from FDCAN FIFO.

Reads one message from receive FIFO. Returns message ID, type of ID, message length and message payload. It is mandatory to provide valid pointers to suitably sized buffers for these outputs. Additionally, it is optinally possible to provide non-zero pointer to obtain filter identification, request of transmission flag and message timestamp. If pointers provided for optional outputs are NULL, then no information is returned for given pointer.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses
[in]fifo_idFIFO id.
[in]releaseRelease the FIFO automatically after copying data out
[out]idReturned message ID. Mandatory.
[out]extReturned type of the message ID (true if extended). Mandatory.
[out]rtrReturnes flag if request of transmission was requested. Optional.
[out]fmiReturned ID of the filter which matched this frame. Optional.
[out]lengthLength of message payload in bytes. Mandatory.
[out]dataBuffer for storage of message payload data. Mandatory.
[out]timestampReturned timestamp of received frame. Optional.
Returns
Operation error status. See FDCAN error return values.

Definition at line 562 of file fdcan_common.c.

References fdcan_rx_fifo_element::data, fdcan_dlc_to_length(), FDCAN_E_NOTAVAIL, FDCAN_E_OK, FDCAN_FIFO_DLC_MASK, FDCAN_FIFO_DLC_SHIFT, FDCAN_FIFO_EID_MASK, FDCAN_FIFO_EID_SHIFT, FDCAN_FIFO_MM_MASK, FDCAN_FIFO_MM_SHIFT, FDCAN_FIFO_RTR, FDCAN_FIFO_RXTS_MASK, FDCAN_FIFO_RXTS_SHIFT, FDCAN_FIFO_SID_MASK, FDCAN_FIFO_SID_SHIFT, FDCAN_FIFO_XTD, fdcan_get_fill_rxfifo(), fdcan_get_rxfifo_addr(), FDCAN_RXFIA, FDCAN_RXFIFO_AI_SHIFT, fdcan_rx_fifo_element::filt_fmt_dlc_ts, and fdcan_rx_fifo_element::identifier_flags.

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◆ fdcan_release_fifo()

void fdcan_release_fifo ( uint32_t  canport,
uint8_t  fifo_id 
)

Release receive oldest FIFO entry.

This function will mask oldest entry in FIFO as released making space for another received frame. This function can be used if fdcan_receive was called using release = false. If used in other case, then messages can get lost.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]fifo_idID of FIFO where release should be performed (0 or 1)

Definition at line 628 of file fdcan_common.c.

References FDCAN_RXFIA, FDCAN_RXFIFO_AI_SHIFT, FDCAN_RXFIFO_FL_SHIFT, FDCAN_RXFIFO_GI_SHIFT, and FDCAN_RXFIS.

◆ fdcan_set_can()

void fdcan_set_can ( uint32_t  canport,
bool  auto_retry_disable,
bool  rx_fifo_locked,
bool  tx_queue_mode,
bool  silent,
uint32_t  n_sjw,
uint32_t  n_ts1,
uint32_t  n_ts2,
uint32_t  n_br_presc 
)

Set essential FDCAN block parameters for plain CAN operation.

Allows configuration of prescalers and essential transmit and FIFO behavior used during transmission in plain CAN 2.0 mode. In this mode FDCAN frame format is not available nor is possible to use fast bitrates. This function does neither enable FD-CAN mode after reset nor disable it after re-entering INIT mode of previously configured block. Timing values set here are valid for both arbitration phase of all frames and for data phase of both CAN and FDCAN frames, which don't use bitrate switching. This function can only be called after FDCAN block has been switched into INIT mode. It is possible to receive FDCAN frames even if FDCAN block is configured only using this function as long as bitrate switching is not used.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]auto_retry_disableDisable automatic frame retransmission on error
[in]rx_fifo_lockedEnable FIFO locked mode. Upon FIFO overflow all received messages are discarded.
[in]tx_queue_modeEnable transmission queue mode. Otherwise transmission works in FIFO mode.
[in]silentEnable silent mode. Transmitter stays recessive all the time.
[in]n_sjwResynchronization time quanta jump width
[in]n_ts1Time segment 1 time quanta
[in]n_ts2Time segment 2 time quanta
[in]n_br_prescArbitration phase / CAN mode bitrate prescaler

Definition at line 296 of file fdcan_common.c.

References FDCAN_CCCR, FDCAN_CCCR_DAR, FDCAN_CCCR_MON, FDCAN_NBTP, FDCAN_NBTP_NBRP_SHIFT, FDCAN_NBTP_NSJW_SHIFT, FDCAN_NBTP_NTSEG1_SHIFT, FDCAN_NBTP_NTSEG2_SHIFT, fdcan_set_fifo_locked_mode(), FDCAN_TXBC, and FDCAN_TXBC_TFQM.

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◆ fdcan_set_ext_filter()

void fdcan_set_ext_filter ( uint32_t  canport,
uint32_t  nr,
uint8_t  id_list_mode,
uint32_t  id1,
uint32_t  id2,
uint8_t  action 
)

Configure filter rule for extended ID frames.

Sets up filter rule for frames having extended ID. Each FDCAN block can have its own set of filtering rules. It is only possible to configure as many filters as was configured previously using fdcan_init_filter.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]nrnumber of filter to be configured
[in]id_list_modemode in which id1 and id2 are used to match the rule. See Extended ID filter match type.
[in]id1extended ID for matching. Used as exact value, lower bound or bit pattern depending on matching mode selected
[in]id2extended ID or bitmask. Used as exact value, upper bound or bit mask depending on matching mode selected
[in]actionAction performed if filtering rule matches frame ID. See Extended ID filter action.

Definition at line 458 of file fdcan_common.c.

References fdcan_extended_filter::conf_id1, FDCAN_EFEC_SHIFT, FDCAN_EFID1_MASK, FDCAN_EFID1_SHIFT, FDCAN_EFID2_MASK, FDCAN_EFID2_SHIFT, FDCAN_EFT_SHIFT, fdcan_get_flesa_addr(), and fdcan_extended_filter::type_id2.

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◆ fdcan_set_fdcan()

void fdcan_set_fdcan ( uint32_t  canport,
bool  brs_enable,
bool  fd_op_enable,
uint32_t  f_sjw,
uint32_t  f_ts1,
uint32_t  f_ts2,
uint32_t  f_br_presc 
)

Set FDCAN block parameters for FDCAN transmission.

Enables and configures parameters related to FDCAN transmission. This function allows configuration of bitrate switching, FDCAN frame format and fast mode timing. This function can only be called if FDCAN block is in INIT mode. It is safe to call this function on previously configured block in order to enable/disable/change FDCAN mode parameters. Non-FDCAN parameters won't be affected.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]brs_enableEnable FDCAN bitrate switching for fast mode operation
[in]fd_op_enableEnable transmission of FDCAN-formatted frames
[in]f_sjwResynchronization time quanta jump width in fast mode
[in]f_ts1Time segment 1 time quanta in fast mode
[in]f_ts2Time segment 2 time quanta in fast mode
[in]f_br_prescFast mode operation bitrate prescaler

Definition at line 343 of file fdcan_common.c.

References FDCAN_CCCR, FDCAN_CCCR_BRSE, FDCAN_CCCR_FDOE, FDCAN_DBTP, FDCAN_DBTP_DBRP_SHIFT, FDCAN_DBTP_DSJW_SHIFT, FDCAN_DBTP_DTSEG1_SHIFT, and FDCAN_DBTP_DTSEG2_SHIFT.

◆ fdcan_set_std_filter()

void fdcan_set_std_filter ( uint32_t  canport,
uint32_t  nr,
uint8_t  id_list_mode,
uint32_t  id1,
uint32_t  id2,
uint8_t  action 
)

Configure filter rule for standard ID frames.

Sets up filter rule for frames having standard ID. Each FDCAN block can have its own set of filtering rules. It is only possible to configure as many filters as was configured previously using fdcan_init_filter.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]nrnumber of filter to be configured
[in]id_list_modeMode in which id1 and id2 are used to match the rule. See Standard ID filter match type.
[in]id1standard ID for matching. Used as exact value, lower bound or bit pattern depending on matching mode selected
[in]id2standard ID or bitmask. Used as exact value, upper bound or bit mask depending on matching mode selected
[in]actionAction performed if filtering rule matches frame ID. See Standard ID filter action.

Definition at line 418 of file fdcan_common.c.

References fdcan_get_flssa_addr(), FDCAN_SFEC_SHIFT, FDCAN_SFID1_MASK, FDCAN_SFID1_SHIFT, FDCAN_SFID2_MASK, FDCAN_SFID2_SHIFT, FDCAN_SFT_SHIFT, and fdcan_standard_filter::type_id1_conf_id2.

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◆ fdcan_set_test()

void fdcan_set_test ( uint32_t  canport,
bool  testing,
bool  loopback 
)

Set FDCAN block testing features.

Configures self-test functions of FDCAN block. It is safe to call this function on fully configured interface. This function can only be called after FDCAN block is put into INIT mode.

Parameters
[in]canportFDCAN block base address. See FDCAN block base addresses.
[in]testingEnables testing mode of FDCAN block
[in]loopbackEnables transmission loopback

Definition at line 374 of file fdcan_common.c.

References FDCAN_CCCR, FDCAN_CCCR_TEST, FDCAN_TEST, and FDCAN_TEST_LBCK.

◆ fdcan_transmit()

int fdcan_transmit ( uint32_t  canport,
uint32_t  id,
bool  ext,
bool  rtr,
bool  fdcan_fmt,
bool  btr_switch,
uint8_t  length,
const uint8_t *  data 
)

Transmit Message using FDCAN.

Parameters
[in]canportCAN block register base. See FDCAN block base addresses.
[in]idMessage ID
[in]extExtended message ID
[in]rtrRequest transmit
[in]fdcan_fmtUse FDCAN format
[in]btr_switchSwitch bitrate for data portion of frame
[in]lengthMessage payload length. Must be valid CAN or FDCAN frame length
[in]dataMessage payload data
Returns
int 0, 1 or 2 on success and depending on which outgoing mailbox got selected. Otherwise returns error code. For error codes, see FDCAN error return values.

Definition at line 486 of file fdcan_common.c.

References fdcan_tx_buffer_element::data, fdcan_tx_buffer_element::evt_fmt_dlc_res, FDCAN_E_BUSY, FDCAN_E_INVALID, FDCAN_FIFO_BRS, FDCAN_FIFO_DLC_SHIFT, FDCAN_FIFO_EID_MASK, FDCAN_FIFO_EID_SHIFT, FDCAN_FIFO_FDF, FDCAN_FIFO_RTR, FDCAN_FIFO_SID_MASK, FDCAN_FIFO_SID_SHIFT, FDCAN_FIFO_XTD, fdcan_get_free_txbuf(), fdcan_get_txbuf_addr(), fdcan_length_to_dlc(), FDCAN_TXBAR, and fdcan_tx_buffer_element::identifier_flags.

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