libopencm3 Cortex-M Data Watchpoint and Trace unit
More...
libopencm3 Cortex-M Data Watchpoint and Trace unit
The DWT provides
- Comparators, that support
- watch points
- data tracing
- signalling to ETM
- PC value tracing
- cycle count matching
- extra PC sampling
- Sampling as a result of a clock count
- external access for sampling
- exception trace
- performance profiling counters.
Which of these features are available is unfortunately implementation defined.
- See also
- ARMv7m Architecture Reference Manual (Chapter ARMv7-M Debug)
LGPL License Terms libopencm3 License
◆ dwt_enable_cycle_counter()
bool dwt_enable_cycle_counter |
( |
void |
| ) |
|
DebugTrace Enable the CPU cycle counter.
This function will try to enable the CPU cycle counter that is intended for benchmarking performance of the code. If function fails, the cycle counter isn't available on this architecture.
- Returns
- true, if success
Definition at line 58 of file dwt.c.
References DWT_CTRL, SCS_DEMCR, and SCS_DEMCR_TRCENA.
◆ dwt_read_cycle_counter()
uint32_t dwt_read_cycle_counter |
( |
void |
| ) |
|
DebugTrace Read the CPU cycle counter.
This function reads the core cycle counter if it is enabled. It is the fastest clock running on the system.
- Note
- The CPU cycle counter must be enabled by dwt_enable_cycle_counter
- Returns
- 0 if cycle counter is not supported or enabled, the cycle counter value otherwise.
Definition at line 90 of file dwt.c.
References DWT_CTRL.