#include <libopencm3/cm3/common.h>
#include <libopencm3/vf6xx/memorymap.h>

Include dependency graph for anadig.h:

This graph shows which files directly or indirectly include this file:

Macros
#define	ANADIG_PLL3_CTRL MMIO32(ANADIG_BASE + 0x010)

#define	ANADIG_PLL7_CTRL MMIO32(ANADIG_BASE + 0x020)

#define	ANADIG_PLL2_CTRL MMIO32(ANADIG_BASE + 0x030)

#define	ANADIG_PLL2_SS MMIO32(ANADIG_BASE + 0x040)

#define	ANADIG_PLL2_NUM MMIO32(ANADIG_BASE + 0x050)

#define	ANADIG_PLL2_DENOM MMIO32(ANADIG_BASE + 0x060)

#define	ANADIG_PLL4_CTRL MMIO32(ANADIG_BASE + 0x070)

#define	ANADIG_PLL4_NUM MMIO32(ANADIG_BASE + 0x080)

#define	ANADIG_PLL4_DENOM MMIO32(ANADIG_BASE + 0x090)

#define	ANADIG_PLL6_CTRL MMIO32(ANADIG_BASE + 0x0A0)

#define	ANADIG_PLL6_NUM MMIO32(ANADIG_BASE + 0x0B0)

#define	ANADIG_PLL6_DENOM MMIO32(ANADIG_BASE + 0x0C0)

#define	ANADIG_PLL5_CTRL MMIO32(ANADIG_BASE + 0x0E0)

#define	ANADIG_PLL3_PFD MMIO32(ANADIG_BASE + 0x0F0)

#define	ANADIG_PLL2_PFD MMIO32(ANADIG_BASE + 0x100)

#define	ANADIG_REG_1P1 MMIO32(ANADIG_BASE + 0x110)

#define	ANADIG_REG_3P0 MMIO32(ANADIG_BASE + 0x120)

#define	ANADIG_REG_2P5 MMIO32(ANADIG_BASE + 0x130)

#define	ANADIG_ANA_MISC0 MMIO32(ANADIG_BASE + 0x150)

#define	ANADIG_ANA_MISC1 MMIO32(ANADIG_BASE + 0x160)

#define	ANADIG_ANADIG_DIGPROG MMIO32(ANADIG_BASE + 0x260)

#define	ANADIG_PLL1_CTRL MMIO32(ANADIG_BASE + 0x270)

#define	ANADIG_PLL1_SS MMIO32(ANADIG_BASE + 0x280)

#define	ANADIG_PLL1_NUM MMIO32(ANADIG_BASE + 0x290)

#define	ANADIG_PLL1_DENOM MMIO32(ANADIG_BASE + 0x2A0)

#define	ANADIG_PLL1_PFD MMIO32(ANADIG_BASE + 0x2B0)

#define	ANADIG_PLL_LOCK MMIO32(ANADIG_BASE + 0x2C0)

#define	ANADIG_PLL3_CTRL_LOCK (1 << 31)

#define	ANADIG_PLL3_CTRL_BYPASS (1 << 16)

#define	ANADIG_PLL3_CTRL_BYPASS_CLK_SRC (1 << 14)

#define	ANADIG_PLL3_CTRL_ENABLE (1 << 13)

#define	ANADIG_PLL3_CTRL_POWER (1 << 12)

#define	ANADIG_PLL3_CTRL_EN_USB_CLKS (1 << 6)

#define	ANADIG_PLL3_CTRL_DIV_SELECT (1 << 1)

#define	ANADIG_PLL7_CTRL_LOCK (1 << 31)

#define	ANADIG_PLL7_CTRL_BYPASS (1 << 16)

#define	ANADIG_PLL7_CTRL_BYPASS_CLK_SRC (1 << 14)

#define	ANADIG_PLL7_CTRL_ENABLE (1 << 13)

#define	ANADIG_PLL7_CTRL_POWER (1 << 12)

#define	ANADIG_PLL7_CTRL_EN_USB_CLKS (1 << 6)

#define	ANADIG_PLL7_CTRL_DIV_SELECT (1 << 1)

#define	ANADIG_PLL2_CTRL_LOCK (1 << 31)

#define	ANADIG_PLL2_CTRL_PFD_OFFSET_EN (1 << 18)

#define	ANADIG_PLL2_CTRL_DITHER_ENABLE (1 << 17)

#define	ANADIG_PLL2_CTRL_BYPASS (1 << 16)

#define	ANADIG_PLL2_CTRL_BYPASS_CLK_SRC (1 << 14)

#define	ANADIG_PLL2_CTRL_ENABLE (1 << 13)

#define	ANADIG_PLL2_CTRL_POWERDOWN (1 << 12)

#define	ANADIG_PLL2_CTRL_DIV_SELECT (1 << 1)

#define	ANADIG_PLL2_SS_STOP_MASK (0xffff << 16)

#define	ANADIG_PLL2_SS_ENABLE (1 << 15)

#define	ANADIG_PLL2_SS_STEP_MASK 0x8fff

#define	ANADIG_PLL2_NUM_MFN_MASK 0x3fffffff

#define	ANADIG_PLL2_DENOM_MFN_MASK 0x3fffffff

#define	ANADIG_PLL4_CTRL_LOCK (1 << 31)

#define	ANADIG_PLL4_CTRL_PFD_OFFSET_EN (1 << 18)

#define	ANADIG_PLL4_CTRL_DITHER_ENABLE (1 << 17)

#define	ANADIG_PLL4_CTRL_BYPASS (1 << 16)

#define	ANADIG_PLL4_CTRL_BYPASS_CLK_SRC (1 << 14)

#define	ANADIG_PLL4_CTRL_ENABLE (1 << 13)

#define	ANADIG_PLL4_CTRL_POWERDOWN (1 << 12)

#define	ANADIG_PLL4_CTRL_DIV_SELECT_MASK (0x7f)

#define	ANADIG_PLL4_NUM_MFN_MASK 0x3fffffff

#define	ANADIG_PLL4_DENOM_MFN_MASK 0x3fffffff

#define	ANADIG_PLL6_CTRL_LOCK (1 << 31)

#define	ANADIG_PLL6_CTRL_PFD_OFFSET_EN (1 << 18)

#define	ANADIG_PLL6_CTRL_DITHER_ENABLE (1 << 17)

#define	ANADIG_PLL6_CTRL_BYPASS (1 << 16)

#define	ANADIG_PLL6_CTRL_BYPASS_CLK_SRC (1 << 14)

#define	ANADIG_PLL6_CTRL_ENABLE (1 << 13)

#define	ANADIG_PLL6_CTRL_POWERDOWN (1 << 12)

#define	ANADIG_PLL6_CTRL_DIV_SELECT_MASK (0x7f)

#define	ANADIG_PLL6_NUM_MFN_MASK 0x3fffffff

#define	ANADIG_PLL6_DENOM_MFN_MASK 0x3fffffff

#define	ANADIG_PLL5_CTRL_LOCK (1 << 31)

#define	ANADIG_PLL5_CTRL_PFD_OFFSET_EN (1 << 18)

#define	ANADIG_PLL5_CTRL_DITHER_ENABLE (1 << 17)

#define	ANADIG_PLL5_CTRL_BYPASS (1 << 16)

#define	ANADIG_PLL5_CTRL_BYPASS_CLK_SRC (1 << 14)

#define	ANADIG_PLL5_CTRL_ENABLE (1 << 13)

#define	ANADIG_PLL5_CTRL_POWERDOWN (1 << 12)

#define	ANADIG_PLL5_CTRL_DIV_SELECT_MASK (0x3)

#define	ANADIG_PLL_PFD4_CLKGATE (1 << 31)

#define	ANADIG_PLL_PFD4_STABLE (1 << 30)

#define	ANADIG_PLL_PFD4_FRAC_SHIFT 24

#define	ANADIG_PLL_PFD4_FRAC_MASK (0x3f << 24)

#define	ANADIG_PLL_PFD3_CLKGATE (1 << 23)

#define	ANADIG_PLL_PFD3_STABLE (1 << 22)

#define	ANADIG_PLL_PFD3_FRAC_SHIFT 16

#define	ANADIG_PLL_PFD3_FRAC_MASK (0x3f << 16)

#define	ANADIG_PLL_PFD2_CLKGATE (1 << 15)

#define	ANADIG_PLL_PFD2_STABLE (1 << 14)

#define	ANADIG_PLL_PFD2_FRAC_SHIFT 8

#define	ANADIG_PLL_PFD2_FRAC_MASK (0x3f << 8)

#define	ANADIG_PLL_PFD1_CLKGATE (1 << 7)

#define	ANADIG_PLL_PFD1_STABLE (1 << 6)

#define	ANADIG_PLL_PFD1_FRAC_SHIFT 0

#define	ANADIG_PLL_PFD1_FRAC_MASK (0x3f << 0)

#define	ANADIG_ANA_MISC0_OSC_XTALOK_EN (1 << 17)

#define	ANADIG_ANA_MISC0_OSC_XTALOK (1 << 16)

#define	ANADIG_ANA_MISC0_CLK_24M_IRC_XTAL_SEL (1 << 13)

#define	ANADIG_ANA_MISC0_STOP_MODE_CONFIG (1 << 12)

#define	ANADIG_ANA_MISC0_REFTOP_VBGUP (1 << 7)

#define	ANADIG_ANA_MISC0_REFTOP_SELBIASOFF (1 << 3)

#define	ANADIG_ANA_MISC0_REFTOP_LOWPOWER (1 << 2)

#define	ANADIG_ANA_MISC0_REFTOP_PWDVBGUP (1 << 1)

#define	ANADIG_ANA_MISC0_REFTOP_PWD (1 << 0)

#define	ANADIG_ANA_MISC1_IRQ_ANA_BO (1 << 30)

#define	ANADIG_ANA_MISC1_IRQ_TEMPSENSE (1 << 29)

#define	ANADIG_ANA_MISC1_LVDSCLK1_IBEN (1 << 12)

#define	ANADIG_ANA_MISC1_LVDSCLK1_OBEN (1 << 10)

#define	ANADIG_ANADIG_DIGPROG_MAJOR_MASK (0xffff << 8)

#define	ANADIG_ANADIG_DIGPROG_MINOR_MASK (0xff << 0)

#define	ANADIG_PLL1_CTRL_LOCK (1 << 31)

#define	ANADIG_PLL1_CTRL_PFD_OFFSET_EN (1 << 18)

#define	ANADIG_PLL1_CTRL_DITHER_ENABLE (1 << 17)

#define	ANADIG_PLL1_CTRL_BYPASS (1 << 16)

#define	ANADIG_PLL1_CTRL_BYPASS_CLK_SRC (1 << 14)

#define	ANADIG_PLL1_CTRL_ENABLE (1 << 13)

#define	ANADIG_PLL1_CTRL_POWERDOWN (1 << 12)

#define	ANADIG_PLL1_CTRL_DIV_SELECT (1 << 1)

#define	ANADIG_PLL1_SS_STOP_MASK (0xffff << 16)

#define	ANADIG_PLL1_SS_ENABLE (1 << 15)

#define	ANADIG_PLL1_SS_STEP_MASK 0x8fff

#define	ANADIG_PLL1_NUM_MFN_MASK 0x3fffffff

#define	ANADIG_PLL1_DENOM_MFN_MASK 0x3fffffff

#define	ANADIG_PLL_LOCK_PLL1 (1 << 6)

#define	ANADIG_PLL_LOCK_PLL2 (1 << 5)

#define	ANADIG_PLL_LOCK_PLL4 (1 << 4)

#define	ANADIG_PLL_LOCK_PLL6 (1 << 3)

#define	ANADIG_PLL_LOCK_PLL5 (1 << 2)

#define	ANADIG_PLL_LOCK_PLL3 (1 << 1)

#define	ANADIG_PLL_LOCK_PLL7 (1 << 0)

Macro Definition Documentation

◆ ANADIG_ANA_MISC0

#define ANADIG_ANA_MISC0 MMIO32(ANADIG_BASE + 0x150)

Definition at line 62 of file anadig.h.

◆ ANADIG_ANA_MISC0_CLK_24M_IRC_XTAL_SEL

#define ANADIG_ANA_MISC0_CLK_24M_IRC_XTAL_SEL (1 << 13)

Definition at line 176 of file anadig.h.

◆ ANADIG_ANA_MISC0_OSC_XTALOK

#define ANADIG_ANA_MISC0_OSC_XTALOK (1 << 16)

Definition at line 175 of file anadig.h.

◆ ANADIG_ANA_MISC0_OSC_XTALOK_EN

#define ANADIG_ANA_MISC0_OSC_XTALOK_EN (1 << 17)

Definition at line 174 of file anadig.h.

◆ ANADIG_ANA_MISC0_REFTOP_LOWPOWER

#define ANADIG_ANA_MISC0_REFTOP_LOWPOWER (1 << 2)

Definition at line 180 of file anadig.h.

◆ ANADIG_ANA_MISC0_REFTOP_PWD

#define ANADIG_ANA_MISC0_REFTOP_PWD (1 << 0)

Definition at line 182 of file anadig.h.

◆ ANADIG_ANA_MISC0_REFTOP_PWDVBGUP

#define ANADIG_ANA_MISC0_REFTOP_PWDVBGUP (1 << 1)

Definition at line 181 of file anadig.h.

◆ ANADIG_ANA_MISC0_REFTOP_SELBIASOFF

#define ANADIG_ANA_MISC0_REFTOP_SELBIASOFF (1 << 3)

Definition at line 179 of file anadig.h.

◆ ANADIG_ANA_MISC0_REFTOP_VBGUP

#define ANADIG_ANA_MISC0_REFTOP_VBGUP (1 << 7)

Definition at line 178 of file anadig.h.

◆ ANADIG_ANA_MISC0_STOP_MODE_CONFIG

#define ANADIG_ANA_MISC0_STOP_MODE_CONFIG (1 << 12)

Definition at line 177 of file anadig.h.

◆ ANADIG_ANA_MISC1

#define ANADIG_ANA_MISC1 MMIO32(ANADIG_BASE + 0x160)

Definition at line 63 of file anadig.h.

◆ ANADIG_ANA_MISC1_IRQ_ANA_BO

#define ANADIG_ANA_MISC1_IRQ_ANA_BO (1 << 30)

Definition at line 185 of file anadig.h.

◆ ANADIG_ANA_MISC1_IRQ_TEMPSENSE

#define ANADIG_ANA_MISC1_IRQ_TEMPSENSE (1 << 29)

Definition at line 186 of file anadig.h.

◆ ANADIG_ANA_MISC1_LVDSCLK1_IBEN

#define ANADIG_ANA_MISC1_LVDSCLK1_IBEN (1 << 12)

Definition at line 187 of file anadig.h.

◆ ANADIG_ANA_MISC1_LVDSCLK1_OBEN

#define ANADIG_ANA_MISC1_LVDSCLK1_OBEN (1 << 10)

Definition at line 188 of file anadig.h.

◆ ANADIG_ANADIG_DIGPROG

#define ANADIG_ANADIG_DIGPROG MMIO32(ANADIG_BASE + 0x260)

Definition at line 64 of file anadig.h.

◆ ANADIG_ANADIG_DIGPROG_MAJOR_MASK

#define ANADIG_ANADIG_DIGPROG_MAJOR_MASK (0xffff << 8)

Definition at line 191 of file anadig.h.

◆ ANADIG_ANADIG_DIGPROG_MINOR_MASK

#define ANADIG_ANADIG_DIGPROG_MINOR_MASK (0xff << 0)

Definition at line 192 of file anadig.h.

◆ ANADIG_PLL1_CTRL

#define ANADIG_PLL1_CTRL MMIO32(ANADIG_BASE + 0x270)

Definition at line 65 of file anadig.h.

◆ ANADIG_PLL1_CTRL_BYPASS

#define ANADIG_PLL1_CTRL_BYPASS (1 << 16)

Definition at line 198 of file anadig.h.

◆ ANADIG_PLL1_CTRL_BYPASS_CLK_SRC

#define ANADIG_PLL1_CTRL_BYPASS_CLK_SRC (1 << 14)

Definition at line 199 of file anadig.h.

◆ ANADIG_PLL1_CTRL_DITHER_ENABLE

#define ANADIG_PLL1_CTRL_DITHER_ENABLE (1 << 17)

Definition at line 197 of file anadig.h.

◆ ANADIG_PLL1_CTRL_DIV_SELECT

#define ANADIG_PLL1_CTRL_DIV_SELECT (1 << 1)

Definition at line 202 of file anadig.h.

◆ ANADIG_PLL1_CTRL_ENABLE

#define ANADIG_PLL1_CTRL_ENABLE (1 << 13)

Definition at line 200 of file anadig.h.

◆ ANADIG_PLL1_CTRL_LOCK

#define ANADIG_PLL1_CTRL_LOCK (1 << 31)

Definition at line 195 of file anadig.h.

◆ ANADIG_PLL1_CTRL_PFD_OFFSET_EN

#define ANADIG_PLL1_CTRL_PFD_OFFSET_EN (1 << 18)

Definition at line 196 of file anadig.h.

◆ ANADIG_PLL1_CTRL_POWERDOWN

#define ANADIG_PLL1_CTRL_POWERDOWN (1 << 12)

Definition at line 201 of file anadig.h.

◆ ANADIG_PLL1_DENOM

#define ANADIG_PLL1_DENOM MMIO32(ANADIG_BASE + 0x2A0)

Definition at line 68 of file anadig.h.

◆ ANADIG_PLL1_DENOM_MFN_MASK

#define ANADIG_PLL1_DENOM_MFN_MASK 0x3fffffff

Definition at line 213 of file anadig.h.

◆ ANADIG_PLL1_NUM

#define ANADIG_PLL1_NUM MMIO32(ANADIG_BASE + 0x290)

Definition at line 67 of file anadig.h.

◆ ANADIG_PLL1_NUM_MFN_MASK

#define ANADIG_PLL1_NUM_MFN_MASK 0x3fffffff

Definition at line 210 of file anadig.h.

◆ ANADIG_PLL1_PFD

#define ANADIG_PLL1_PFD MMIO32(ANADIG_BASE + 0x2B0)

Definition at line 69 of file anadig.h.

◆ ANADIG_PLL1_SS

#define ANADIG_PLL1_SS MMIO32(ANADIG_BASE + 0x280)

Definition at line 66 of file anadig.h.

◆ ANADIG_PLL1_SS_ENABLE

#define ANADIG_PLL1_SS_ENABLE (1 << 15)

Definition at line 206 of file anadig.h.

◆ ANADIG_PLL1_SS_STEP_MASK

#define ANADIG_PLL1_SS_STEP_MASK 0x8fff

Definition at line 207 of file anadig.h.

◆ ANADIG_PLL1_SS_STOP_MASK

#define ANADIG_PLL1_SS_STOP_MASK (0xffff << 16)

Definition at line 205 of file anadig.h.

◆ ANADIG_PLL2_CTRL

#define ANADIG_PLL2_CTRL MMIO32(ANADIG_BASE + 0x030)

Definition at line 46 of file anadig.h.

◆ ANADIG_PLL2_CTRL_BYPASS

#define ANADIG_PLL2_CTRL_BYPASS (1 << 16)

Definition at line 96 of file anadig.h.

◆ ANADIG_PLL2_CTRL_BYPASS_CLK_SRC

#define ANADIG_PLL2_CTRL_BYPASS_CLK_SRC (1 << 14)

Definition at line 97 of file anadig.h.

◆ ANADIG_PLL2_CTRL_DITHER_ENABLE

#define ANADIG_PLL2_CTRL_DITHER_ENABLE (1 << 17)

Definition at line 95 of file anadig.h.

◆ ANADIG_PLL2_CTRL_DIV_SELECT

#define ANADIG_PLL2_CTRL_DIV_SELECT (1 << 1)

Definition at line 100 of file anadig.h.

◆ ANADIG_PLL2_CTRL_ENABLE

#define ANADIG_PLL2_CTRL_ENABLE (1 << 13)

Definition at line 98 of file anadig.h.

◆ ANADIG_PLL2_CTRL_LOCK

#define ANADIG_PLL2_CTRL_LOCK (1 << 31)

Definition at line 93 of file anadig.h.

◆ ANADIG_PLL2_CTRL_PFD_OFFSET_EN

#define ANADIG_PLL2_CTRL_PFD_OFFSET_EN (1 << 18)

Definition at line 94 of file anadig.h.

◆ ANADIG_PLL2_CTRL_POWERDOWN

#define ANADIG_PLL2_CTRL_POWERDOWN (1 << 12)

Definition at line 99 of file anadig.h.

◆ ANADIG_PLL2_DENOM

#define ANADIG_PLL2_DENOM MMIO32(ANADIG_BASE + 0x060)

Definition at line 49 of file anadig.h.

◆ ANADIG_PLL2_DENOM_MFN_MASK

#define ANADIG_PLL2_DENOM_MFN_MASK 0x3fffffff

Definition at line 111 of file anadig.h.

◆ ANADIG_PLL2_NUM

#define ANADIG_PLL2_NUM MMIO32(ANADIG_BASE + 0x050)

Definition at line 48 of file anadig.h.

◆ ANADIG_PLL2_NUM_MFN_MASK

#define ANADIG_PLL2_NUM_MFN_MASK 0x3fffffff

Definition at line 108 of file anadig.h.

◆ ANADIG_PLL2_PFD

#define ANADIG_PLL2_PFD MMIO32(ANADIG_BASE + 0x100)

Definition at line 58 of file anadig.h.

◆ ANADIG_PLL2_SS

#define ANADIG_PLL2_SS MMIO32(ANADIG_BASE + 0x040)

Definition at line 47 of file anadig.h.

◆ ANADIG_PLL2_SS_ENABLE

#define ANADIG_PLL2_SS_ENABLE (1 << 15)

Definition at line 104 of file anadig.h.

◆ ANADIG_PLL2_SS_STEP_MASK

#define ANADIG_PLL2_SS_STEP_MASK 0x8fff

Definition at line 105 of file anadig.h.

◆ ANADIG_PLL2_SS_STOP_MASK

#define ANADIG_PLL2_SS_STOP_MASK (0xffff << 16)

Definition at line 103 of file anadig.h.

◆ ANADIG_PLL3_CTRL

#define ANADIG_PLL3_CTRL MMIO32(ANADIG_BASE + 0x010)

Definition at line 44 of file anadig.h.

◆ ANADIG_PLL3_CTRL_BYPASS

#define ANADIG_PLL3_CTRL_BYPASS (1 << 16)

Definition at line 76 of file anadig.h.

◆ ANADIG_PLL3_CTRL_BYPASS_CLK_SRC

#define ANADIG_PLL3_CTRL_BYPASS_CLK_SRC (1 << 14)

Definition at line 77 of file anadig.h.

◆ ANADIG_PLL3_CTRL_DIV_SELECT

#define ANADIG_PLL3_CTRL_DIV_SELECT (1 << 1)

Definition at line 81 of file anadig.h.

◆ ANADIG_PLL3_CTRL_EN_USB_CLKS

#define ANADIG_PLL3_CTRL_EN_USB_CLKS (1 << 6)

Definition at line 80 of file anadig.h.

◆ ANADIG_PLL3_CTRL_ENABLE

#define ANADIG_PLL3_CTRL_ENABLE (1 << 13)

Definition at line 78 of file anadig.h.

◆ ANADIG_PLL3_CTRL_LOCK

#define ANADIG_PLL3_CTRL_LOCK (1 << 31)

Definition at line 75 of file anadig.h.

◆ ANADIG_PLL3_CTRL_POWER

#define ANADIG_PLL3_CTRL_POWER (1 << 12)

Definition at line 79 of file anadig.h.

◆ ANADIG_PLL3_PFD

#define ANADIG_PLL3_PFD MMIO32(ANADIG_BASE + 0x0F0)

Definition at line 57 of file anadig.h.

◆ ANADIG_PLL4_CTRL

#define ANADIG_PLL4_CTRL MMIO32(ANADIG_BASE + 0x070)

Definition at line 50 of file anadig.h.

◆ ANADIG_PLL4_CTRL_BYPASS

#define ANADIG_PLL4_CTRL_BYPASS (1 << 16)

Definition at line 117 of file anadig.h.

◆ ANADIG_PLL4_CTRL_BYPASS_CLK_SRC

#define ANADIG_PLL4_CTRL_BYPASS_CLK_SRC (1 << 14)

Definition at line 118 of file anadig.h.

◆ ANADIG_PLL4_CTRL_DITHER_ENABLE

#define ANADIG_PLL4_CTRL_DITHER_ENABLE (1 << 17)

Definition at line 116 of file anadig.h.

◆ ANADIG_PLL4_CTRL_DIV_SELECT_MASK

#define ANADIG_PLL4_CTRL_DIV_SELECT_MASK (0x7f)

Definition at line 121 of file anadig.h.

◆ ANADIG_PLL4_CTRL_ENABLE

#define ANADIG_PLL4_CTRL_ENABLE (1 << 13)

Definition at line 119 of file anadig.h.

◆ ANADIG_PLL4_CTRL_LOCK

#define ANADIG_PLL4_CTRL_LOCK (1 << 31)

Definition at line 114 of file anadig.h.

◆ ANADIG_PLL4_CTRL_PFD_OFFSET_EN

#define ANADIG_PLL4_CTRL_PFD_OFFSET_EN (1 << 18)

Definition at line 115 of file anadig.h.

◆ ANADIG_PLL4_CTRL_POWERDOWN

#define ANADIG_PLL4_CTRL_POWERDOWN (1 << 12)

Definition at line 120 of file anadig.h.

◆ ANADIG_PLL4_DENOM

#define ANADIG_PLL4_DENOM MMIO32(ANADIG_BASE + 0x090)

Definition at line 52 of file anadig.h.

◆ ANADIG_PLL4_DENOM_MFN_MASK

#define ANADIG_PLL4_DENOM_MFN_MASK 0x3fffffff

Definition at line 127 of file anadig.h.

◆ ANADIG_PLL4_NUM

#define ANADIG_PLL4_NUM MMIO32(ANADIG_BASE + 0x080)

Definition at line 51 of file anadig.h.

◆ ANADIG_PLL4_NUM_MFN_MASK

#define ANADIG_PLL4_NUM_MFN_MASK 0x3fffffff

Definition at line 124 of file anadig.h.

◆ ANADIG_PLL5_CTRL

#define ANADIG_PLL5_CTRL MMIO32(ANADIG_BASE + 0x0E0)

Definition at line 56 of file anadig.h.

◆ ANADIG_PLL5_CTRL_BYPASS

#define ANADIG_PLL5_CTRL_BYPASS (1 << 16)

Definition at line 149 of file anadig.h.

◆ ANADIG_PLL5_CTRL_BYPASS_CLK_SRC

#define ANADIG_PLL5_CTRL_BYPASS_CLK_SRC (1 << 14)

Definition at line 150 of file anadig.h.

◆ ANADIG_PLL5_CTRL_DITHER_ENABLE

#define ANADIG_PLL5_CTRL_DITHER_ENABLE (1 << 17)

Definition at line 148 of file anadig.h.

◆ ANADIG_PLL5_CTRL_DIV_SELECT_MASK

#define ANADIG_PLL5_CTRL_DIV_SELECT_MASK (0x3)

Definition at line 153 of file anadig.h.

◆ ANADIG_PLL5_CTRL_ENABLE

#define ANADIG_PLL5_CTRL_ENABLE (1 << 13)

Definition at line 151 of file anadig.h.

◆ ANADIG_PLL5_CTRL_LOCK

#define ANADIG_PLL5_CTRL_LOCK (1 << 31)

Definition at line 146 of file anadig.h.

◆ ANADIG_PLL5_CTRL_PFD_OFFSET_EN

#define ANADIG_PLL5_CTRL_PFD_OFFSET_EN (1 << 18)

Definition at line 147 of file anadig.h.

◆ ANADIG_PLL5_CTRL_POWERDOWN

#define ANADIG_PLL5_CTRL_POWERDOWN (1 << 12)

Definition at line 152 of file anadig.h.

◆ ANADIG_PLL6_CTRL

#define ANADIG_PLL6_CTRL MMIO32(ANADIG_BASE + 0x0A0)

Definition at line 53 of file anadig.h.

◆ ANADIG_PLL6_CTRL_BYPASS

#define ANADIG_PLL6_CTRL_BYPASS (1 << 16)

Definition at line 133 of file anadig.h.

◆ ANADIG_PLL6_CTRL_BYPASS_CLK_SRC

#define ANADIG_PLL6_CTRL_BYPASS_CLK_SRC (1 << 14)

Definition at line 134 of file anadig.h.

◆ ANADIG_PLL6_CTRL_DITHER_ENABLE

#define ANADIG_PLL6_CTRL_DITHER_ENABLE (1 << 17)

Definition at line 132 of file anadig.h.

◆ ANADIG_PLL6_CTRL_DIV_SELECT_MASK

#define ANADIG_PLL6_CTRL_DIV_SELECT_MASK (0x7f)

Definition at line 137 of file anadig.h.

◆ ANADIG_PLL6_CTRL_ENABLE

#define ANADIG_PLL6_CTRL_ENABLE (1 << 13)

Definition at line 135 of file anadig.h.

◆ ANADIG_PLL6_CTRL_LOCK

#define ANADIG_PLL6_CTRL_LOCK (1 << 31)

Definition at line 130 of file anadig.h.

◆ ANADIG_PLL6_CTRL_PFD_OFFSET_EN

#define ANADIG_PLL6_CTRL_PFD_OFFSET_EN (1 << 18)

Definition at line 131 of file anadig.h.

◆ ANADIG_PLL6_CTRL_POWERDOWN

#define ANADIG_PLL6_CTRL_POWERDOWN (1 << 12)

Definition at line 136 of file anadig.h.

◆ ANADIG_PLL6_DENOM

#define ANADIG_PLL6_DENOM MMIO32(ANADIG_BASE + 0x0C0)

Definition at line 55 of file anadig.h.

◆ ANADIG_PLL6_DENOM_MFN_MASK

#define ANADIG_PLL6_DENOM_MFN_MASK 0x3fffffff

Definition at line 143 of file anadig.h.

◆ ANADIG_PLL6_NUM

#define ANADIG_PLL6_NUM MMIO32(ANADIG_BASE + 0x0B0)

Definition at line 54 of file anadig.h.

◆ ANADIG_PLL6_NUM_MFN_MASK

#define ANADIG_PLL6_NUM_MFN_MASK 0x3fffffff

Definition at line 140 of file anadig.h.

◆ ANADIG_PLL7_CTRL

#define ANADIG_PLL7_CTRL MMIO32(ANADIG_BASE + 0x020)

Definition at line 45 of file anadig.h.

◆ ANADIG_PLL7_CTRL_BYPASS

#define ANADIG_PLL7_CTRL_BYPASS (1 << 16)

Definition at line 85 of file anadig.h.

◆ ANADIG_PLL7_CTRL_BYPASS_CLK_SRC

#define ANADIG_PLL7_CTRL_BYPASS_CLK_SRC (1 << 14)

Definition at line 86 of file anadig.h.

◆ ANADIG_PLL7_CTRL_DIV_SELECT

#define ANADIG_PLL7_CTRL_DIV_SELECT (1 << 1)

Definition at line 90 of file anadig.h.

◆ ANADIG_PLL7_CTRL_EN_USB_CLKS

#define ANADIG_PLL7_CTRL_EN_USB_CLKS (1 << 6)

Definition at line 89 of file anadig.h.

◆ ANADIG_PLL7_CTRL_ENABLE

#define ANADIG_PLL7_CTRL_ENABLE (1 << 13)

Definition at line 87 of file anadig.h.

◆ ANADIG_PLL7_CTRL_LOCK

#define ANADIG_PLL7_CTRL_LOCK (1 << 31)

Definition at line 84 of file anadig.h.

◆ ANADIG_PLL7_CTRL_POWER

#define ANADIG_PLL7_CTRL_POWER (1 << 12)

Definition at line 88 of file anadig.h.

◆ ANADIG_PLL_LOCK

#define ANADIG_PLL_LOCK MMIO32(ANADIG_BASE + 0x2C0)

Definition at line 70 of file anadig.h.

◆ ANADIG_PLL_LOCK_PLL1

#define ANADIG_PLL_LOCK_PLL1 (1 << 6)

Definition at line 216 of file anadig.h.

◆ ANADIG_PLL_LOCK_PLL2

#define ANADIG_PLL_LOCK_PLL2 (1 << 5)

Definition at line 217 of file anadig.h.

◆ ANADIG_PLL_LOCK_PLL3

#define ANADIG_PLL_LOCK_PLL3 (1 << 1)

Definition at line 221 of file anadig.h.

◆ ANADIG_PLL_LOCK_PLL4

#define ANADIG_PLL_LOCK_PLL4 (1 << 4)

Definition at line 218 of file anadig.h.

◆ ANADIG_PLL_LOCK_PLL5

#define ANADIG_PLL_LOCK_PLL5 (1 << 2)

Definition at line 220 of file anadig.h.

◆ ANADIG_PLL_LOCK_PLL6

#define ANADIG_PLL_LOCK_PLL6 (1 << 3)

Definition at line 219 of file anadig.h.

◆ ANADIG_PLL_LOCK_PLL7

#define ANADIG_PLL_LOCK_PLL7 (1 << 0)

Definition at line 222 of file anadig.h.

◆ ANADIG_PLL_PFD1_CLKGATE

#define ANADIG_PLL_PFD1_CLKGATE (1 << 7)

Definition at line 168 of file anadig.h.

◆ ANADIG_PLL_PFD1_FRAC_MASK

#define ANADIG_PLL_PFD1_FRAC_MASK (0x3f << 0)

Definition at line 171 of file anadig.h.

◆ ANADIG_PLL_PFD1_FRAC_SHIFT

#define ANADIG_PLL_PFD1_FRAC_SHIFT 0

Definition at line 170 of file anadig.h.

◆ ANADIG_PLL_PFD1_STABLE

#define ANADIG_PLL_PFD1_STABLE (1 << 6)

Definition at line 169 of file anadig.h.

◆ ANADIG_PLL_PFD2_CLKGATE

#define ANADIG_PLL_PFD2_CLKGATE (1 << 15)

Definition at line 164 of file anadig.h.

◆ ANADIG_PLL_PFD2_FRAC_MASK

#define ANADIG_PLL_PFD2_FRAC_MASK (0x3f << 8)

Definition at line 167 of file anadig.h.

◆ ANADIG_PLL_PFD2_FRAC_SHIFT

#define ANADIG_PLL_PFD2_FRAC_SHIFT 8

Definition at line 166 of file anadig.h.

◆ ANADIG_PLL_PFD2_STABLE

#define ANADIG_PLL_PFD2_STABLE (1 << 14)

Definition at line 165 of file anadig.h.

◆ ANADIG_PLL_PFD3_CLKGATE

#define ANADIG_PLL_PFD3_CLKGATE (1 << 23)

Definition at line 160 of file anadig.h.

◆ ANADIG_PLL_PFD3_FRAC_MASK

#define ANADIG_PLL_PFD3_FRAC_MASK (0x3f << 16)

Definition at line 163 of file anadig.h.

◆ ANADIG_PLL_PFD3_FRAC_SHIFT

#define ANADIG_PLL_PFD3_FRAC_SHIFT 16

Definition at line 162 of file anadig.h.

◆ ANADIG_PLL_PFD3_STABLE

#define ANADIG_PLL_PFD3_STABLE (1 << 22)

Definition at line 161 of file anadig.h.

◆ ANADIG_PLL_PFD4_CLKGATE

#define ANADIG_PLL_PFD4_CLKGATE (1 << 31)

Definition at line 156 of file anadig.h.

◆ ANADIG_PLL_PFD4_FRAC_MASK

#define ANADIG_PLL_PFD4_FRAC_MASK (0x3f << 24)

Definition at line 159 of file anadig.h.

◆ ANADIG_PLL_PFD4_FRAC_SHIFT

#define ANADIG_PLL_PFD4_FRAC_SHIFT 24

Definition at line 158 of file anadig.h.

◆ ANADIG_PLL_PFD4_STABLE

#define ANADIG_PLL_PFD4_STABLE (1 << 30)

Definition at line 157 of file anadig.h.

◆ ANADIG_REG_1P1

#define ANADIG_REG_1P1 MMIO32(ANADIG_BASE + 0x110)

Definition at line 59 of file anadig.h.

◆ ANADIG_REG_2P5

#define ANADIG_REG_2P5 MMIO32(ANADIG_BASE + 0x130)

Definition at line 61 of file anadig.h.

◆ ANADIG_REG_3P0

#define ANADIG_REG_3P0 MMIO32(ANADIG_BASE + 0x120)

Definition at line 60 of file anadig.h.

Macros