General Purpose DMA Defines
Defined Constants and Types for the LPC43xx General Purpose DMA More...
Collaboration diagram for General Purpose DMA Defines:
Detailed Description
Defined Constants and Types for the LPC43xx General Purpose DMA
- Version
- 1.0.0
- Date
- 10 March 2013
LGPL License Terms libopencm3 License
Macro Definition Documentation
◆ GPDMA_C0CONFIG
| #define GPDMA_C0CONFIG GPDMA_CCONFIG(0) |
◆ GPDMA_C0CONTROL
| #define GPDMA_C0CONTROL GPDMA_CCONTROL(0) |
◆ GPDMA_C0DESTADDR
| #define GPDMA_C0DESTADDR GPDMA_CDESTADDR(0) |
◆ GPDMA_C0LLI
| #define GPDMA_C0LLI GPDMA_CLLI(0) |
◆ GPDMA_C0SRCADDR
| #define GPDMA_C0SRCADDR GPDMA_CSRCADDR(0) |
◆ GPDMA_C1CONFIG
| #define GPDMA_C1CONFIG GPDMA_CCONFIG(1) |
◆ GPDMA_C1CONTROL
| #define GPDMA_C1CONTROL GPDMA_CCONTROL(1) |
◆ GPDMA_C1DESTADDR
| #define GPDMA_C1DESTADDR GPDMA_CDESTADDR(1) |
◆ GPDMA_C1LLI
| #define GPDMA_C1LLI GPDMA_CLLI(1) |
◆ GPDMA_C1SRCADDR
| #define GPDMA_C1SRCADDR GPDMA_CSRCADDR(1) |
◆ GPDMA_C2CONFIG
| #define GPDMA_C2CONFIG GPDMA_CCONFIG(2) |
◆ GPDMA_C2CONTROL
| #define GPDMA_C2CONTROL GPDMA_CCONTROL(2) |
◆ GPDMA_C2DESTADDR
| #define GPDMA_C2DESTADDR GPDMA_CDESTADDR(2) |
◆ GPDMA_C2LLI
| #define GPDMA_C2LLI GPDMA_CLLI(2) |
◆ GPDMA_C2SRCADDR
| #define GPDMA_C2SRCADDR GPDMA_CSRCADDR(2) |
◆ GPDMA_C3CONFIG
| #define GPDMA_C3CONFIG GPDMA_CCONFIG(3) |
◆ GPDMA_C3CONTROL
| #define GPDMA_C3CONTROL GPDMA_CCONTROL(3) |
◆ GPDMA_C3DESTADDR
| #define GPDMA_C3DESTADDR GPDMA_CDESTADDR(3) |
◆ GPDMA_C3LLI
| #define GPDMA_C3LLI GPDMA_CLLI(3) |
◆ GPDMA_C3SRCADDR
| #define GPDMA_C3SRCADDR GPDMA_CSRCADDR(3) |
◆ GPDMA_C4CONFIG
| #define GPDMA_C4CONFIG GPDMA_CCONFIG(4) |
◆ GPDMA_C4CONTROL
| #define GPDMA_C4CONTROL GPDMA_CCONTROL(4) |
◆ GPDMA_C4DESTADDR
| #define GPDMA_C4DESTADDR GPDMA_CDESTADDR(4) |
◆ GPDMA_C4LLI
| #define GPDMA_C4LLI GPDMA_CLLI(4) |
◆ GPDMA_C4SRCADDR
| #define GPDMA_C4SRCADDR GPDMA_CSRCADDR(4) |
◆ GPDMA_C5CONFIG
| #define GPDMA_C5CONFIG GPDMA_CCONFIG(5) |
◆ GPDMA_C5CONTROL
| #define GPDMA_C5CONTROL GPDMA_CCONTROL(5) |
◆ GPDMA_C5DESTADDR
| #define GPDMA_C5DESTADDR GPDMA_CDESTADDR(5) |
◆ GPDMA_C5LLI
| #define GPDMA_C5LLI GPDMA_CLLI(5) |
◆ GPDMA_C5SRCADDR
| #define GPDMA_C5SRCADDR GPDMA_CSRCADDR(5) |
◆ GPDMA_C6CONFIG
| #define GPDMA_C6CONFIG GPDMA_CCONFIG(6) |
◆ GPDMA_C6CONTROL
| #define GPDMA_C6CONTROL GPDMA_CCONTROL(6) |
◆ GPDMA_C6DESTADDR
| #define GPDMA_C6DESTADDR GPDMA_CDESTADDR(6) |
◆ GPDMA_C6LLI
| #define GPDMA_C6LLI GPDMA_CLLI(6) |
◆ GPDMA_C6SRCADDR
| #define GPDMA_C6SRCADDR GPDMA_CSRCADDR(6) |
◆ GPDMA_C7CONFIG
| #define GPDMA_C7CONFIG GPDMA_CCONFIG(7) |
◆ GPDMA_C7CONTROL
| #define GPDMA_C7CONTROL GPDMA_CCONTROL(7) |
◆ GPDMA_C7DESTADDR
| #define GPDMA_C7DESTADDR GPDMA_CDESTADDR(7) |
◆ GPDMA_C7LLI
| #define GPDMA_C7LLI GPDMA_CLLI(7) |
◆ GPDMA_C7SRCADDR
| #define GPDMA_C7SRCADDR GPDMA_CSRCADDR(7) |
◆ GPDMA_CCONFIG
| #define GPDMA_CCONFIG | ( | channel | ) |
Value:
MMIO32(GPDMA_BASE + 0x110 + \
(channel * 0x20))
◆ GPDMA_CCONFIG_A
| #define GPDMA_CCONFIG_A | ( | x | ) | ((x) << GPDMA_CCONFIG_A_SHIFT) |
◆ GPDMA_CCONFIG_A_MASK
| #define GPDMA_CCONFIG_A_MASK (0x1 << GPDMA_CCONFIG_A_SHIFT) |
◆ GPDMA_CCONFIG_A_SHIFT
◆ GPDMA_CCONFIG_DESTPERIPHERAL
| #define GPDMA_CCONFIG_DESTPERIPHERAL | ( | x | ) | ((x) << GPDMA_CCONFIG_DESTPERIPHERAL_SHIFT) |
◆ GPDMA_CCONFIG_DESTPERIPHERAL_MASK
| #define GPDMA_CCONFIG_DESTPERIPHERAL_MASK (0x1f << GPDMA_CCONFIG_DESTPERIPHERAL_SHIFT) |
◆ GPDMA_CCONFIG_DESTPERIPHERAL_SHIFT
◆ GPDMA_CCONFIG_E
| #define GPDMA_CCONFIG_E | ( | x | ) | ((x) << GPDMA_CCONFIG_E_SHIFT) |
◆ GPDMA_CCONFIG_E_MASK
| #define GPDMA_CCONFIG_E_MASK (0x1 << GPDMA_CCONFIG_E_SHIFT) |
◆ GPDMA_CCONFIG_E_SHIFT
◆ GPDMA_CCONFIG_FLOWCNTRL
| #define GPDMA_CCONFIG_FLOWCNTRL | ( | x | ) | ((x) << GPDMA_CCONFIG_FLOWCNTRL_SHIFT) |
◆ GPDMA_CCONFIG_FLOWCNTRL_MASK
| #define GPDMA_CCONFIG_FLOWCNTRL_MASK (0x7 << GPDMA_CCONFIG_FLOWCNTRL_SHIFT) |
◆ GPDMA_CCONFIG_FLOWCNTRL_SHIFT
◆ GPDMA_CCONFIG_H
| #define GPDMA_CCONFIG_H | ( | x | ) | ((x) << GPDMA_CCONFIG_H_SHIFT) |
◆ GPDMA_CCONFIG_H_MASK
| #define GPDMA_CCONFIG_H_MASK (0x1 << GPDMA_CCONFIG_H_SHIFT) |
◆ GPDMA_CCONFIG_H_SHIFT
◆ GPDMA_CCONFIG_IE
| #define GPDMA_CCONFIG_IE | ( | x | ) | ((x) << GPDMA_CCONFIG_IE_SHIFT) |
◆ GPDMA_CCONFIG_IE_MASK
| #define GPDMA_CCONFIG_IE_MASK (0x1 << GPDMA_CCONFIG_IE_SHIFT) |
◆ GPDMA_CCONFIG_IE_SHIFT
◆ GPDMA_CCONFIG_ITC
| #define GPDMA_CCONFIG_ITC | ( | x | ) | ((x) << GPDMA_CCONFIG_ITC_SHIFT) |
◆ GPDMA_CCONFIG_ITC_MASK
| #define GPDMA_CCONFIG_ITC_MASK (0x1 << GPDMA_CCONFIG_ITC_SHIFT) |
◆ GPDMA_CCONFIG_ITC_SHIFT
◆ GPDMA_CCONFIG_L
| #define GPDMA_CCONFIG_L | ( | x | ) | ((x) << GPDMA_CCONFIG_L_SHIFT) |
◆ GPDMA_CCONFIG_L_MASK
| #define GPDMA_CCONFIG_L_MASK (0x1 << GPDMA_CCONFIG_L_SHIFT) |
◆ GPDMA_CCONFIG_L_SHIFT
◆ GPDMA_CCONFIG_SRCPERIPHERAL
| #define GPDMA_CCONFIG_SRCPERIPHERAL | ( | x | ) | ((x) << GPDMA_CCONFIG_SRCPERIPHERAL_SHIFT) |
◆ GPDMA_CCONFIG_SRCPERIPHERAL_MASK
| #define GPDMA_CCONFIG_SRCPERIPHERAL_MASK (0x1f << GPDMA_CCONFIG_SRCPERIPHERAL_SHIFT) |
◆ GPDMA_CCONFIG_SRCPERIPHERAL_SHIFT
◆ GPDMA_CCONTROL
| #define GPDMA_CCONTROL | ( | channel | ) |
Value:
MMIO32(GPDMA_BASE + 0x10C + \
(channel * 0x20))
◆ GPDMA_CCONTROL_D
| #define GPDMA_CCONTROL_D | ( | x | ) | ((x) << GPDMA_CCONTROL_D_SHIFT) |
◆ GPDMA_CCONTROL_D_MASK
| #define GPDMA_CCONTROL_D_MASK (0x1 << GPDMA_CCONTROL_D_SHIFT) |
◆ GPDMA_CCONTROL_D_SHIFT
◆ GPDMA_CCONTROL_DBSIZE
| #define GPDMA_CCONTROL_DBSIZE | ( | x | ) | ((x) << GPDMA_CCONTROL_DBSIZE_SHIFT) |
◆ GPDMA_CCONTROL_DBSIZE_MASK
| #define GPDMA_CCONTROL_DBSIZE_MASK (0x7 << GPDMA_CCONTROL_DBSIZE_SHIFT) |
◆ GPDMA_CCONTROL_DBSIZE_SHIFT
◆ GPDMA_CCONTROL_DI
| #define GPDMA_CCONTROL_DI | ( | x | ) | ((x) << GPDMA_CCONTROL_DI_SHIFT) |
◆ GPDMA_CCONTROL_DI_MASK
| #define GPDMA_CCONTROL_DI_MASK (0x1 << GPDMA_CCONTROL_DI_SHIFT) |
◆ GPDMA_CCONTROL_DI_SHIFT
◆ GPDMA_CCONTROL_DWIDTH
| #define GPDMA_CCONTROL_DWIDTH | ( | x | ) | ((x) << GPDMA_CCONTROL_DWIDTH_SHIFT) |
◆ GPDMA_CCONTROL_DWIDTH_MASK
| #define GPDMA_CCONTROL_DWIDTH_MASK (0x7 << GPDMA_CCONTROL_DWIDTH_SHIFT) |
◆ GPDMA_CCONTROL_DWIDTH_SHIFT
◆ GPDMA_CCONTROL_I
| #define GPDMA_CCONTROL_I | ( | x | ) | ((x) << GPDMA_CCONTROL_I_SHIFT) |
◆ GPDMA_CCONTROL_I_MASK
| #define GPDMA_CCONTROL_I_MASK (0x1 << GPDMA_CCONTROL_I_SHIFT) |
◆ GPDMA_CCONTROL_I_SHIFT
◆ GPDMA_CCONTROL_PROT1
| #define GPDMA_CCONTROL_PROT1 | ( | x | ) | ((x) << GPDMA_CCONTROL_PROT1_SHIFT) |
◆ GPDMA_CCONTROL_PROT1_MASK
| #define GPDMA_CCONTROL_PROT1_MASK (0x1 << GPDMA_CCONTROL_PROT1_SHIFT) |
◆ GPDMA_CCONTROL_PROT1_SHIFT
◆ GPDMA_CCONTROL_PROT2
| #define GPDMA_CCONTROL_PROT2 | ( | x | ) | ((x) << GPDMA_CCONTROL_PROT2_SHIFT) |
◆ GPDMA_CCONTROL_PROT2_MASK
| #define GPDMA_CCONTROL_PROT2_MASK (0x1 << GPDMA_CCONTROL_PROT2_SHIFT) |
◆ GPDMA_CCONTROL_PROT2_SHIFT
◆ GPDMA_CCONTROL_PROT3
| #define GPDMA_CCONTROL_PROT3 | ( | x | ) | ((x) << GPDMA_CCONTROL_PROT3_SHIFT) |
◆ GPDMA_CCONTROL_PROT3_MASK
| #define GPDMA_CCONTROL_PROT3_MASK (0x1 << GPDMA_CCONTROL_PROT3_SHIFT) |
◆ GPDMA_CCONTROL_PROT3_SHIFT
◆ GPDMA_CCONTROL_S
| #define GPDMA_CCONTROL_S | ( | x | ) | ((x) << GPDMA_CCONTROL_S_SHIFT) |
◆ GPDMA_CCONTROL_S_MASK
| #define GPDMA_CCONTROL_S_MASK (0x1 << GPDMA_CCONTROL_S_SHIFT) |
◆ GPDMA_CCONTROL_S_SHIFT
◆ GPDMA_CCONTROL_SBSIZE
| #define GPDMA_CCONTROL_SBSIZE | ( | x | ) | ((x) << GPDMA_CCONTROL_SBSIZE_SHIFT) |
◆ GPDMA_CCONTROL_SBSIZE_MASK
| #define GPDMA_CCONTROL_SBSIZE_MASK (0x7 << GPDMA_CCONTROL_SBSIZE_SHIFT) |
◆ GPDMA_CCONTROL_SBSIZE_SHIFT
◆ GPDMA_CCONTROL_SI
| #define GPDMA_CCONTROL_SI | ( | x | ) | ((x) << GPDMA_CCONTROL_SI_SHIFT) |
◆ GPDMA_CCONTROL_SI_MASK
| #define GPDMA_CCONTROL_SI_MASK (0x1 << GPDMA_CCONTROL_SI_SHIFT) |
◆ GPDMA_CCONTROL_SI_SHIFT
◆ GPDMA_CCONTROL_SWIDTH
| #define GPDMA_CCONTROL_SWIDTH | ( | x | ) | ((x) << GPDMA_CCONTROL_SWIDTH_SHIFT) |
◆ GPDMA_CCONTROL_SWIDTH_MASK
| #define GPDMA_CCONTROL_SWIDTH_MASK (0x7 << GPDMA_CCONTROL_SWIDTH_SHIFT) |
◆ GPDMA_CCONTROL_SWIDTH_SHIFT
◆ GPDMA_CCONTROL_TRANSFERSIZE
| #define GPDMA_CCONTROL_TRANSFERSIZE | ( | x | ) | ((x) << GPDMA_CCONTROL_TRANSFERSIZE_SHIFT) |
◆ GPDMA_CCONTROL_TRANSFERSIZE_MASK
| #define GPDMA_CCONTROL_TRANSFERSIZE_MASK (0xfff << GPDMA_CCONTROL_TRANSFERSIZE_SHIFT) |
◆ GPDMA_CCONTROL_TRANSFERSIZE_SHIFT
◆ GPDMA_CDESTADDR
| #define GPDMA_CDESTADDR | ( | channel | ) |
Value:
MMIO32(GPDMA_BASE + 0x104 + \
(channel * 0x20))
◆ GPDMA_CDESTADDR_DESTADDR
| #define GPDMA_CDESTADDR_DESTADDR | ( | x | ) | ((x) << GPDMA_CDESTADDR_DESTADDR_SHIFT) |
◆ GPDMA_CDESTADDR_DESTADDR_MASK
| #define GPDMA_CDESTADDR_DESTADDR_MASK (0xffffffff << GPDMA_CDESTADDR_DESTADDR_SHIFT) |
◆ GPDMA_CDESTADDR_DESTADDR_SHIFT
◆ GPDMA_CLLI
| #define GPDMA_CLLI | ( | channel | ) |
Value:
MMIO32(GPDMA_BASE + 0x108 + \
(channel * 0x20))
◆ GPDMA_CLLI_LLI
| #define GPDMA_CLLI_LLI | ( | x | ) | ((x) << GPDMA_CLLI_LLI_SHIFT) |
◆ GPDMA_CLLI_LLI_MASK
| #define GPDMA_CLLI_LLI_MASK (0x3fffffff << GPDMA_CLLI_LLI_SHIFT) |
◆ GPDMA_CLLI_LLI_SHIFT
◆ GPDMA_CLLI_LM
| #define GPDMA_CLLI_LM | ( | x | ) | ((x) << GPDMA_CLLI_LM_SHIFT) |
◆ GPDMA_CLLI_LM_MASK
| #define GPDMA_CLLI_LM_MASK (0x1 << GPDMA_CLLI_LM_SHIFT) |
◆ GPDMA_CLLI_LM_SHIFT
◆ GPDMA_CONFIG
| #define GPDMA_CONFIG MMIO32(GPDMA_BASE + 0x030) |
◆ GPDMA_CONFIG_E
| #define GPDMA_CONFIG_E | ( | x | ) | ((x) << GPDMA_CONFIG_E_SHIFT) |
◆ GPDMA_CONFIG_E_MASK
| #define GPDMA_CONFIG_E_MASK (0x1 << GPDMA_CONFIG_E_SHIFT) |
◆ GPDMA_CONFIG_E_SHIFT
◆ GPDMA_CONFIG_M0
| #define GPDMA_CONFIG_M0 | ( | x | ) | ((x) << GPDMA_CONFIG_M0_SHIFT) |
◆ GPDMA_CONFIG_M0_MASK
| #define GPDMA_CONFIG_M0_MASK (0x1 << GPDMA_CONFIG_M0_SHIFT) |
◆ GPDMA_CONFIG_M0_SHIFT
◆ GPDMA_CONFIG_M1
| #define GPDMA_CONFIG_M1 | ( | x | ) | ((x) << GPDMA_CONFIG_M1_SHIFT) |
◆ GPDMA_CONFIG_M1_MASK
| #define GPDMA_CONFIG_M1_MASK (0x1 << GPDMA_CONFIG_M1_SHIFT) |
◆ GPDMA_CONFIG_M1_SHIFT
◆ GPDMA_CSRCADDR
| #define GPDMA_CSRCADDR | ( | channel | ) |
Value:
MMIO32(GPDMA_BASE + 0x100 + \
(channel * 0x20))
◆ GPDMA_CSRCADDR_SRCADDR
| #define GPDMA_CSRCADDR_SRCADDR | ( | x | ) | ((x) << GPDMA_CSRCADDR_SRCADDR_SHIFT) |
◆ GPDMA_CSRCADDR_SRCADDR_MASK
| #define GPDMA_CSRCADDR_SRCADDR_MASK (0xffffffff << GPDMA_CSRCADDR_SRCADDR_SHIFT) |
◆ GPDMA_CSRCADDR_SRCADDR_SHIFT
◆ GPDMA_Cx0CONTROL_SI
| #define GPDMA_Cx0CONTROL_SI | ( | x | ) | ((x) << GPDMA_CxCONTROL_SI_SHIFT) |
◆ GPDMA_CxCONFIG_A
| #define GPDMA_CxCONFIG_A | ( | x | ) | ((x) << GPDMA_CxCONFIG_A_SHIFT) |
◆ GPDMA_CxCONFIG_A_MASK
| #define GPDMA_CxCONFIG_A_MASK (0x1 << GPDMA_CxCONFIG_A_SHIFT) |
◆ GPDMA_CxCONFIG_A_SHIFT
◆ GPDMA_CxCONFIG_DESTPERIPHERAL
| #define GPDMA_CxCONFIG_DESTPERIPHERAL | ( | x | ) | ((x) << GPDMA_CxCONFIG_DESTPERIPHERAL_SHIFT) |
◆ GPDMA_CxCONFIG_DESTPERIPHERAL_MASK
| #define GPDMA_CxCONFIG_DESTPERIPHERAL_MASK (0x1f << GPDMA_CxCONFIG_DESTPERIPHERAL_SHIFT) |
◆ GPDMA_CxCONFIG_DESTPERIPHERAL_SHIFT
◆ GPDMA_CxCONFIG_E
| #define GPDMA_CxCONFIG_E | ( | x | ) | ((x) << GPDMA_CxCONFIG_E_SHIFT) |
◆ GPDMA_CxCONFIG_E_MASK
| #define GPDMA_CxCONFIG_E_MASK (0x1 << GPDMA_CxCONFIG_E_SHIFT) |
◆ GPDMA_CxCONFIG_E_SHIFT
◆ GPDMA_CxCONFIG_FLOWCNTRL
| #define GPDMA_CxCONFIG_FLOWCNTRL | ( | x | ) | ((x) << GPDMA_CxCONFIG_FLOWCNTRL_SHIFT) |
◆ GPDMA_CxCONFIG_FLOWCNTRL_MASK
| #define GPDMA_CxCONFIG_FLOWCNTRL_MASK (0x7 << GPDMA_CxCONFIG_FLOWCNTRL_SHIFT) |
◆ GPDMA_CxCONFIG_FLOWCNTRL_SHIFT
◆ GPDMA_CxCONFIG_H
| #define GPDMA_CxCONFIG_H | ( | x | ) | ((x) << GPDMA_CxCONFIG_H_SHIFT) |
◆ GPDMA_CxCONFIG_H_MASK
| #define GPDMA_CxCONFIG_H_MASK (0x1 << GPDMA_CxCONFIG_H_SHIFT) |
◆ GPDMA_CxCONFIG_H_SHIFT
◆ GPDMA_CxCONFIG_IE
| #define GPDMA_CxCONFIG_IE | ( | x | ) | ((x) << GPDMA_CxCONFIG_IE_SHIFT) |
◆ GPDMA_CxCONFIG_IE_MASK
| #define GPDMA_CxCONFIG_IE_MASK (0x1 << GPDMA_CxCONFIG_IE_SHIFT) |
◆ GPDMA_CxCONFIG_IE_SHIFT
◆ GPDMA_CxCONFIG_ITC
| #define GPDMA_CxCONFIG_ITC | ( | x | ) | ((x) << GPDMA_CxCONFIG_ITC_SHIFT) |
◆ GPDMA_CxCONFIG_ITC_MASK
| #define GPDMA_CxCONFIG_ITC_MASK (0x1 << GPDMA_CxCONFIG_ITC_SHIFT) |
◆ GPDMA_CxCONFIG_ITC_SHIFT
◆ GPDMA_CxCONFIG_L
| #define GPDMA_CxCONFIG_L | ( | x | ) | ((x) << GPDMA_CxCONFIG_L_SHIFT) |
◆ GPDMA_CxCONFIG_L_MASK
| #define GPDMA_CxCONFIG_L_MASK (0x1 << GPDMA_CxCONFIG_L_SHIFT) |
◆ GPDMA_CxCONFIG_L_SHIFT
◆ GPDMA_CxCONFIG_SRCPERIPHERAL
| #define GPDMA_CxCONFIG_SRCPERIPHERAL | ( | x | ) | ((x) << GPDMA_CxCONFIG_SRCPERIPHERAL_SHIFT) |
◆ GPDMA_CxCONFIG_SRCPERIPHERAL_MASK
| #define GPDMA_CxCONFIG_SRCPERIPHERAL_MASK (0x1f << GPDMA_CxCONFIG_SRCPERIPHERAL_SHIFT) |
◆ GPDMA_CxCONFIG_SRCPERIPHERAL_SHIFT
◆ GPDMA_CxCONTROL_D
| #define GPDMA_CxCONTROL_D | ( | x | ) | ((x) << GPDMA_CxCONTROL_D_SHIFT) |
◆ GPDMA_CxCONTROL_D_MASK
| #define GPDMA_CxCONTROL_D_MASK (0x1 << GPDMA_CxCONTROL_D_SHIFT) |
◆ GPDMA_CxCONTROL_D_SHIFT
◆ GPDMA_CxCONTROL_DBSIZE
| #define GPDMA_CxCONTROL_DBSIZE | ( | x | ) | ((x) << GPDMA_CxCONTROL_DBSIZE_SHIFT) |
◆ GPDMA_CxCONTROL_DBSIZE_MASK
| #define GPDMA_CxCONTROL_DBSIZE_MASK (0x7 << GPDMA_CxCONTROL_DBSIZE_SHIFT) |
◆ GPDMA_CxCONTROL_DBSIZE_SHIFT
◆ GPDMA_CxCONTROL_DI
| #define GPDMA_CxCONTROL_DI | ( | x | ) | ((x) << GPDMA_CxCONTROL_DI_SHIFT) |
◆ GPDMA_CxCONTROL_DI_MASK
| #define GPDMA_CxCONTROL_DI_MASK (0x1 << GPDMA_CxCONTROL_DI_SHIFT) |
◆ GPDMA_CxCONTROL_DI_SHIFT
◆ GPDMA_CxCONTROL_DWIDTH
| #define GPDMA_CxCONTROL_DWIDTH | ( | x | ) | ((x) << GPDMA_CxCONTROL_DWIDTH_SHIFT) |
◆ GPDMA_CxCONTROL_DWIDTH_MASK
| #define GPDMA_CxCONTROL_DWIDTH_MASK (0x7 << GPDMA_CxCONTROL_DWIDTH_SHIFT) |
◆ GPDMA_CxCONTROL_DWIDTH_SHIFT
◆ GPDMA_CxCONTROL_I
| #define GPDMA_CxCONTROL_I | ( | x | ) | ((x) << GPDMA_CxCONTROL_I_SHIFT) |
◆ GPDMA_CxCONTROL_I_MASK
| #define GPDMA_CxCONTROL_I_MASK (0x1 << GPDMA_CxCONTROL_I_SHIFT) |
◆ GPDMA_CxCONTROL_I_SHIFT
◆ GPDMA_CxCONTROL_PROT1
| #define GPDMA_CxCONTROL_PROT1 | ( | x | ) | ((x) << GPDMA_CxCONTROL_PROT1_SHIFT) |
◆ GPDMA_CxCONTROL_PROT1_MASK
| #define GPDMA_CxCONTROL_PROT1_MASK (0x1 << GPDMA_CxCONTROL_PROT1_SHIFT) |
◆ GPDMA_CxCONTROL_PROT1_SHIFT
◆ GPDMA_CxCONTROL_PROT2
| #define GPDMA_CxCONTROL_PROT2 | ( | x | ) | ((x) << GPDMA_CxCONTROL_PROT2_SHIFT) |
◆ GPDMA_CxCONTROL_PROT2_MASK
| #define GPDMA_CxCONTROL_PROT2_MASK (0x1 << GPDMA_CxCONTROL_PROT2_SHIFT) |
◆ GPDMA_CxCONTROL_PROT2_SHIFT
◆ GPDMA_CxCONTROL_PROT3
| #define GPDMA_CxCONTROL_PROT3 | ( | x | ) | ((x) << GPDMA_CxCONTROL_PROT3_SHIFT) |
◆ GPDMA_CxCONTROL_PROT3_MASK
| #define GPDMA_CxCONTROL_PROT3_MASK (0x1 << GPDMA_CxCONTROL_PROT3_SHIFT) |
◆ GPDMA_CxCONTROL_PROT3_SHIFT
◆ GPDMA_CxCONTROL_S
| #define GPDMA_CxCONTROL_S | ( | x | ) | ((x) << GPDMA_CxCONTROL_S_SHIFT) |
◆ GPDMA_CxCONTROL_S_MASK
| #define GPDMA_CxCONTROL_S_MASK (0x1 << GPDMA_CxCONTROL_S_SHIFT) |
◆ GPDMA_CxCONTROL_S_SHIFT
◆ GPDMA_CxCONTROL_SBSIZE
| #define GPDMA_CxCONTROL_SBSIZE | ( | x | ) | ((x) << GPDMA_CxCONTROL_SBSIZE_SHIFT) |
◆ GPDMA_CxCONTROL_SBSIZE_MASK
| #define GPDMA_CxCONTROL_SBSIZE_MASK (0x7 << GPDMA_CxCONTROL_SBSIZE_SHIFT) |
◆ GPDMA_CxCONTROL_SBSIZE_SHIFT
◆ GPDMA_CxCONTROL_SI_MASK
| #define GPDMA_CxCONTROL_SI_MASK (0x1 << GPDMA_CxCONTROL_SI_SHIFT) |
◆ GPDMA_CxCONTROL_SI_SHIFT
◆ GPDMA_CxCONTROL_SWIDTH
| #define GPDMA_CxCONTROL_SWIDTH | ( | x | ) | ((x) << GPDMA_CxCONTROL_SWIDTH_SHIFT) |
◆ GPDMA_CxCONTROL_SWIDTH_MASK
| #define GPDMA_CxCONTROL_SWIDTH_MASK (0x7 << GPDMA_CxCONTROL_SWIDTH_SHIFT) |
◆ GPDMA_CxCONTROL_SWIDTH_SHIFT
◆ GPDMA_CxCONTROL_TRANSFERSIZE
| #define GPDMA_CxCONTROL_TRANSFERSIZE | ( | x | ) | ((x) << GPDMA_CxCONTROL_TRANSFERSIZE_SHIFT) |
◆ GPDMA_CxCONTROL_TRANSFERSIZE_MASK
| #define GPDMA_CxCONTROL_TRANSFERSIZE_MASK (0xfff << GPDMA_CxCONTROL_TRANSFERSIZE_SHIFT) |
◆ GPDMA_CxCONTROL_TRANSFERSIZE_SHIFT
◆ GPDMA_CxDESTADDR_DESTADDR
| #define GPDMA_CxDESTADDR_DESTADDR | ( | x | ) | ((x) << GPDMA_CxDESTADDR_DESTADDR_SHIFT) |
◆ GPDMA_CxDESTADDR_DESTADDR_MASK
| #define GPDMA_CxDESTADDR_DESTADDR_MASK (0xffffffff << GPDMA_CxDESTADDR_DESTADDR_SHIFT) |
◆ GPDMA_CxDESTADDR_DESTADDR_SHIFT
◆ GPDMA_CxLLI_LLI
| #define GPDMA_CxLLI_LLI | ( | x | ) | ((x) << GPDMA_CxLLI_LLI_SHIFT) |
◆ GPDMA_CxLLI_LLI_MASK
| #define GPDMA_CxLLI_LLI_MASK (0x3fffffff << GPDMA_CxLLI_LLI_SHIFT) |
◆ GPDMA_CxLLI_LLI_SHIFT
◆ GPDMA_CxLLI_LM
| #define GPDMA_CxLLI_LM | ( | x | ) | ((x) << GPDMA_CxLLI_LM_SHIFT) |
◆ GPDMA_CxLLI_LM_MASK
| #define GPDMA_CxLLI_LM_MASK (0x1 << GPDMA_CxLLI_LM_SHIFT) |
◆ GPDMA_CxLLI_LM_SHIFT
◆ GPDMA_CxSRCADDR_SRCADDR
| #define GPDMA_CxSRCADDR_SRCADDR | ( | x | ) | ((x) << GPDMA_CxSRCADDR_SRCADDR_SHIFT) |
◆ GPDMA_CxSRCADDR_SRCADDR_MASK
| #define GPDMA_CxSRCADDR_SRCADDR_MASK (0xffffffff << GPDMA_CxSRCADDR_SRCADDR_SHIFT) |
◆ GPDMA_CxSRCADDR_SRCADDR_SHIFT
◆ GPDMA_ENBLDCHNS
| #define GPDMA_ENBLDCHNS MMIO32(GPDMA_BASE + 0x01C) |
◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS
| #define GPDMA_ENBLDCHNS_ENABLEDCHANNELS | ( | x | ) | ((x) << GPDMA_ENBLDCHNS_ENABLEDCHANNELS_SHIFT) |
◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS_MASK
| #define GPDMA_ENBLDCHNS_ENABLEDCHANNELS_MASK (0xff << GPDMA_ENBLDCHNS_ENABLEDCHANNELS_SHIFT) |
◆ GPDMA_ENBLDCHNS_ENABLEDCHANNELS_SHIFT
◆ GPDMA_INTERRCLR
| #define GPDMA_INTERRCLR MMIO32(GPDMA_BASE + 0x010) |
◆ GPDMA_INTERRCLR_INTERRCLR
| #define GPDMA_INTERRCLR_INTERRCLR | ( | x | ) | ((x) << GPDMA_INTERRCLR_INTERRCLR_SHIFT) |
◆ GPDMA_INTERRCLR_INTERRCLR_MASK
| #define GPDMA_INTERRCLR_INTERRCLR_MASK (0xff << GPDMA_INTERRCLR_INTERRCLR_SHIFT) |
◆ GPDMA_INTERRCLR_INTERRCLR_SHIFT
◆ GPDMA_INTERRSTAT
| #define GPDMA_INTERRSTAT MMIO32(GPDMA_BASE + 0x00C) |
◆ GPDMA_INTERRSTAT_INTERRSTAT
| #define GPDMA_INTERRSTAT_INTERRSTAT | ( | x | ) | ((x) << GPDMA_INTERRSTAT_INTERRSTAT_SHIFT) |
◆ GPDMA_INTERRSTAT_INTERRSTAT_MASK
| #define GPDMA_INTERRSTAT_INTERRSTAT_MASK (0xff << GPDMA_INTERRSTAT_INTERRSTAT_SHIFT) |
◆ GPDMA_INTERRSTAT_INTERRSTAT_SHIFT
◆ GPDMA_INTSTAT
| #define GPDMA_INTSTAT MMIO32(GPDMA_BASE + 0x000) |
◆ GPDMA_INTTCCLEAR
| #define GPDMA_INTTCCLEAR MMIO32(GPDMA_BASE + 0x008) |
◆ GPDMA_INTTCCLEAR_INTTCCLEAR
| #define GPDMA_INTTCCLEAR_INTTCCLEAR | ( | x | ) | ((x) << GPDMA_INTTCCLEAR_INTTCCLEAR_SHIFT) |
◆ GPDMA_INTTCCLEAR_INTTCCLEAR_MASK
| #define GPDMA_INTTCCLEAR_INTTCCLEAR_MASK (0xff << GPDMA_INTTCCLEAR_INTTCCLEAR_SHIFT) |
◆ GPDMA_INTTCCLEAR_INTTCCLEAR_SHIFT
◆ GPDMA_INTTCSTAT
| #define GPDMA_INTTCSTAT MMIO32(GPDMA_BASE + 0x004) |
◆ GPDMA_INTTCSTAT_INTTCSTAT
| #define GPDMA_INTTCSTAT_INTTCSTAT | ( | x | ) | ((x) << GPDMA_INTTCSTAT_INTTCSTAT_SHIFT) |
◆ GPDMA_INTTCSTAT_INTTCSTAT_MASK
| #define GPDMA_INTTCSTAT_INTTCSTAT_MASK (0xff << GPDMA_INTTCSTAT_INTTCSTAT_SHIFT) |
◆ GPDMA_INTTCSTAT_INTTCSTAT_SHIFT
◆ GPDMA_NTSTAT_INTSTAT
| #define GPDMA_NTSTAT_INTSTAT | ( | x | ) | ((x) << GPDMA_NTSTAT_INTSTAT_SHIFT) |
◆ GPDMA_NTSTAT_INTSTAT_MASK
| #define GPDMA_NTSTAT_INTSTAT_MASK (0xff << GPDMA_NTSTAT_INTSTAT_SHIFT) |
◆ GPDMA_NTSTAT_INTSTAT_SHIFT
◆ GPDMA_RAWINTERRSTAT
| #define GPDMA_RAWINTERRSTAT MMIO32(GPDMA_BASE + 0x018) |
◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT
| #define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT | ( | x | ) | ((x) << GPDMA_RAWINTERRSTAT_RAWINTERRSTAT_SHIFT) |
◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT_MASK
| #define GPDMA_RAWINTERRSTAT_RAWINTERRSTAT_MASK (0xff << GPDMA_RAWINTERRSTAT_RAWINTERRSTAT_SHIFT) |
◆ GPDMA_RAWINTERRSTAT_RAWINTERRSTAT_SHIFT
◆ GPDMA_RAWINTTCSTAT
| #define GPDMA_RAWINTTCSTAT MMIO32(GPDMA_BASE + 0x014) |
◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT
| #define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT | ( | x | ) | ((x) << GPDMA_RAWINTTCSTAT_RAWINTTCSTAT_SHIFT) |
◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT_MASK
| #define GPDMA_RAWINTTCSTAT_RAWINTTCSTAT_MASK (0xff << GPDMA_RAWINTTCSTAT_RAWINTTCSTAT_SHIFT) |
◆ GPDMA_RAWINTTCSTAT_RAWINTTCSTAT_SHIFT
◆ GPDMA_SOFTBREQ
| #define GPDMA_SOFTBREQ MMIO32(GPDMA_BASE + 0x020) |
◆ GPDMA_SOFTBREQ_SOFTBREQ
| #define GPDMA_SOFTBREQ_SOFTBREQ | ( | x | ) | ((x) << GPDMA_SOFTBREQ_SOFTBREQ_SHIFT) |
◆ GPDMA_SOFTBREQ_SOFTBREQ_MASK
| #define GPDMA_SOFTBREQ_SOFTBREQ_MASK (0xffff << GPDMA_SOFTBREQ_SOFTBREQ_SHIFT) |
◆ GPDMA_SOFTBREQ_SOFTBREQ_SHIFT
◆ GPDMA_SOFTLBREQ
| #define GPDMA_SOFTLBREQ MMIO32(GPDMA_BASE + 0x028) |
◆ GPDMA_SOFTLBREQ_SOFTLBREQ
| #define GPDMA_SOFTLBREQ_SOFTLBREQ | ( | x | ) | ((x) << GPDMA_SOFTLBREQ_SOFTLBREQ_SHIFT) |
◆ GPDMA_SOFTLBREQ_SOFTLBREQ_MASK
| #define GPDMA_SOFTLBREQ_SOFTLBREQ_MASK (0xffff << GPDMA_SOFTLBREQ_SOFTLBREQ_SHIFT) |
◆ GPDMA_SOFTLBREQ_SOFTLBREQ_SHIFT
◆ GPDMA_SOFTLSREQ
| #define GPDMA_SOFTLSREQ MMIO32(GPDMA_BASE + 0x02C) |
◆ GPDMA_SOFTLSREQ_SOFTLSREQ
| #define GPDMA_SOFTLSREQ_SOFTLSREQ | ( | x | ) | ((x) << GPDMA_SOFTLSREQ_SOFTLSREQ_SHIFT) |
◆ GPDMA_SOFTLSREQ_SOFTLSREQ_MASK
| #define GPDMA_SOFTLSREQ_SOFTLSREQ_MASK (0xffff << GPDMA_SOFTLSREQ_SOFTLSREQ_SHIFT) |
◆ GPDMA_SOFTLSREQ_SOFTLSREQ_SHIFT
◆ GPDMA_SOFTSREQ
| #define GPDMA_SOFTSREQ MMIO32(GPDMA_BASE + 0x024) |
◆ GPDMA_SOFTSREQ_SOFTSREQ
| #define GPDMA_SOFTSREQ_SOFTSREQ | ( | x | ) | ((x) << GPDMA_SOFTSREQ_SOFTSREQ_SHIFT) |
◆ GPDMA_SOFTSREQ_SOFTSREQ_MASK
| #define GPDMA_SOFTSREQ_SOFTSREQ_MASK (0xffff << GPDMA_SOFTSREQ_SOFTSREQ_SHIFT) |
◆ GPDMA_SOFTSREQ_SOFTSREQ_SHIFT
◆ GPDMA_SYNC
| #define GPDMA_SYNC MMIO32(GPDMA_BASE + 0x034) |
◆ GPDMA_SYNC_DMACSYNC
| #define GPDMA_SYNC_DMACSYNC | ( | x | ) | ((x) << GPDMA_SYNC_DMACSYNC_SHIFT) |
◆ GPDMA_SYNC_DMACSYNC_MASK
| #define GPDMA_SYNC_DMACSYNC_MASK (0xffff << GPDMA_SYNC_DMACSYNC_SHIFT) |
