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#define | GPDMA_INTSTAT MMIO32(GPDMA_BASE + 0x000) |
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#define | GPDMA_INTTCSTAT MMIO32(GPDMA_BASE + 0x004) |
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#define | GPDMA_INTTCCLEAR MMIO32(GPDMA_BASE + 0x008) |
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#define | GPDMA_INTERRSTAT MMIO32(GPDMA_BASE + 0x00C) |
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#define | GPDMA_INTERRCLR MMIO32(GPDMA_BASE + 0x010) |
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#define | GPDMA_RAWINTTCSTAT MMIO32(GPDMA_BASE + 0x014) |
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#define | GPDMA_RAWINTERRSTAT MMIO32(GPDMA_BASE + 0x018) |
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#define | GPDMA_ENBLDCHNS MMIO32(GPDMA_BASE + 0x01C) |
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#define | GPDMA_SOFTBREQ MMIO32(GPDMA_BASE + 0x020) |
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#define | GPDMA_SOFTSREQ MMIO32(GPDMA_BASE + 0x024) |
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#define | GPDMA_SOFTLBREQ MMIO32(GPDMA_BASE + 0x028) |
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#define | GPDMA_SOFTLSREQ MMIO32(GPDMA_BASE + 0x02C) |
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#define | GPDMA_CONFIG MMIO32(GPDMA_BASE + 0x030) |
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#define | GPDMA_SYNC MMIO32(GPDMA_BASE + 0x034) |
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#define | GPDMA_CSRCADDR(channel) |
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#define | GPDMA_C0SRCADDR GPDMA_CSRCADDR(0) |
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#define | GPDMA_C1SRCADDR GPDMA_CSRCADDR(1) |
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#define | GPDMA_C2SRCADDR GPDMA_CSRCADDR(2) |
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#define | GPDMA_C3SRCADDR GPDMA_CSRCADDR(3) |
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#define | GPDMA_C4SRCADDR GPDMA_CSRCADDR(4) |
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#define | GPDMA_C5SRCADDR GPDMA_CSRCADDR(5) |
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#define | GPDMA_C6SRCADDR GPDMA_CSRCADDR(6) |
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#define | GPDMA_C7SRCADDR GPDMA_CSRCADDR(7) |
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#define | GPDMA_CDESTADDR(channel) |
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#define | GPDMA_C0DESTADDR GPDMA_CDESTADDR(0) |
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#define | GPDMA_C1DESTADDR GPDMA_CDESTADDR(1) |
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#define | GPDMA_C2DESTADDR GPDMA_CDESTADDR(2) |
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#define | GPDMA_C3DESTADDR GPDMA_CDESTADDR(3) |
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#define | GPDMA_C4DESTADDR GPDMA_CDESTADDR(4) |
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#define | GPDMA_C5DESTADDR GPDMA_CDESTADDR(5) |
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#define | GPDMA_C6DESTADDR GPDMA_CDESTADDR(6) |
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#define | GPDMA_C7DESTADDR GPDMA_CDESTADDR(7) |
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#define | GPDMA_CLLI(channel) |
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#define | GPDMA_C0LLI GPDMA_CLLI(0) |
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#define | GPDMA_C1LLI GPDMA_CLLI(1) |
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#define | GPDMA_C2LLI GPDMA_CLLI(2) |
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#define | GPDMA_C3LLI GPDMA_CLLI(3) |
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#define | GPDMA_C4LLI GPDMA_CLLI(4) |
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#define | GPDMA_C5LLI GPDMA_CLLI(5) |
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#define | GPDMA_C6LLI GPDMA_CLLI(6) |
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#define | GPDMA_C7LLI GPDMA_CLLI(7) |
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#define | GPDMA_CCONTROL(channel) |
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#define | GPDMA_C0CONTROL GPDMA_CCONTROL(0) |
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#define | GPDMA_C1CONTROL GPDMA_CCONTROL(1) |
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#define | GPDMA_C2CONTROL GPDMA_CCONTROL(2) |
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#define | GPDMA_C3CONTROL GPDMA_CCONTROL(3) |
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#define | GPDMA_C4CONTROL GPDMA_CCONTROL(4) |
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#define | GPDMA_C5CONTROL GPDMA_CCONTROL(5) |
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#define | GPDMA_C6CONTROL GPDMA_CCONTROL(6) |
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#define | GPDMA_C7CONTROL GPDMA_CCONTROL(7) |
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#define | GPDMA_CCONFIG(channel) |
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#define | GPDMA_C0CONFIG GPDMA_CCONFIG(0) |
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#define | GPDMA_C1CONFIG GPDMA_CCONFIG(1) |
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#define | GPDMA_C2CONFIG GPDMA_CCONFIG(2) |
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#define | GPDMA_C3CONFIG GPDMA_CCONFIG(3) |
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#define | GPDMA_C4CONFIG GPDMA_CCONFIG(4) |
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#define | GPDMA_C5CONFIG GPDMA_CCONFIG(5) |
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#define | GPDMA_C6CONFIG GPDMA_CCONFIG(6) |
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#define | GPDMA_C7CONFIG GPDMA_CCONFIG(7) |
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#define | GPDMA_CSRCADDR_SRCADDR_SHIFT (0) |
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#define | GPDMA_CSRCADDR_SRCADDR_MASK (0xffffffff << GPDMA_CSRCADDR_SRCADDR_SHIFT) |
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#define | GPDMA_CSRCADDR_SRCADDR(x) ((x) << GPDMA_CSRCADDR_SRCADDR_SHIFT) |
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#define | GPDMA_CDESTADDR_DESTADDR_SHIFT (0) |
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#define | GPDMA_CDESTADDR_DESTADDR_MASK (0xffffffff << GPDMA_CDESTADDR_DESTADDR_SHIFT) |
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#define | GPDMA_CDESTADDR_DESTADDR(x) ((x) << GPDMA_CDESTADDR_DESTADDR_SHIFT) |
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#define | GPDMA_CLLI_LM_SHIFT (0) |
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#define | GPDMA_CLLI_LM_MASK (0x1 << GPDMA_CLLI_LM_SHIFT) |
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#define | GPDMA_CLLI_LM(x) ((x) << GPDMA_CLLI_LM_SHIFT) |
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#define | GPDMA_CLLI_LLI_SHIFT (2) |
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#define | GPDMA_CLLI_LLI_MASK (0x3fffffff << GPDMA_CLLI_LLI_SHIFT) |
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#define | GPDMA_CLLI_LLI(x) ((x) << GPDMA_CLLI_LLI_SHIFT) |
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#define | GPDMA_CCONTROL_TRANSFERSIZE_SHIFT (0) |
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#define | GPDMA_CCONTROL_TRANSFERSIZE_MASK (0xfff << GPDMA_CCONTROL_TRANSFERSIZE_SHIFT) |
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#define | GPDMA_CCONTROL_TRANSFERSIZE(x) ((x) << GPDMA_CCONTROL_TRANSFERSIZE_SHIFT) |
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#define | GPDMA_CCONTROL_SBSIZE_SHIFT (12) |
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#define | GPDMA_CCONTROL_SBSIZE_MASK (0x7 << GPDMA_CCONTROL_SBSIZE_SHIFT) |
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#define | GPDMA_CCONTROL_SBSIZE(x) ((x) << GPDMA_CCONTROL_SBSIZE_SHIFT) |
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#define | GPDMA_CCONTROL_DBSIZE_SHIFT (15) |
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#define | GPDMA_CCONTROL_DBSIZE_MASK (0x7 << GPDMA_CCONTROL_DBSIZE_SHIFT) |
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#define | GPDMA_CCONTROL_DBSIZE(x) ((x) << GPDMA_CCONTROL_DBSIZE_SHIFT) |
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#define | GPDMA_CCONTROL_SWIDTH_SHIFT (18) |
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#define | GPDMA_CCONTROL_SWIDTH_MASK (0x7 << GPDMA_CCONTROL_SWIDTH_SHIFT) |
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#define | GPDMA_CCONTROL_SWIDTH(x) ((x) << GPDMA_CCONTROL_SWIDTH_SHIFT) |
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#define | GPDMA_CCONTROL_DWIDTH_SHIFT (21) |
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#define | GPDMA_CCONTROL_DWIDTH_MASK (0x7 << GPDMA_CCONTROL_DWIDTH_SHIFT) |
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#define | GPDMA_CCONTROL_DWIDTH(x) ((x) << GPDMA_CCONTROL_DWIDTH_SHIFT) |
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#define | GPDMA_CCONTROL_S_SHIFT (24) |
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#define | GPDMA_CCONTROL_S_MASK (0x1 << GPDMA_CCONTROL_S_SHIFT) |
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#define | GPDMA_CCONTROL_S(x) ((x) << GPDMA_CCONTROL_S_SHIFT) |
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#define | GPDMA_CCONTROL_D_SHIFT (25) |
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#define | GPDMA_CCONTROL_D_MASK (0x1 << GPDMA_CCONTROL_D_SHIFT) |
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#define | GPDMA_CCONTROL_D(x) ((x) << GPDMA_CCONTROL_D_SHIFT) |
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#define | GPDMA_CCONTROL_SI_SHIFT (26) |
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#define | GPDMA_CCONTROL_SI_MASK (0x1 << GPDMA_CCONTROL_SI_SHIFT) |
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#define | GPDMA_CCONTROL_SI(x) ((x) << GPDMA_CCONTROL_SI_SHIFT) |
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#define | GPDMA_CCONTROL_DI_SHIFT (27) |
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#define | GPDMA_CCONTROL_DI_MASK (0x1 << GPDMA_CCONTROL_DI_SHIFT) |
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#define | GPDMA_CCONTROL_DI(x) ((x) << GPDMA_CCONTROL_DI_SHIFT) |
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#define | GPDMA_CCONTROL_PROT1_SHIFT (28) |
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#define | GPDMA_CCONTROL_PROT1_MASK (0x1 << GPDMA_CCONTROL_PROT1_SHIFT) |
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#define | GPDMA_CCONTROL_PROT1(x) ((x) << GPDMA_CCONTROL_PROT1_SHIFT) |
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#define | GPDMA_CCONTROL_PROT2_SHIFT (29) |
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#define | GPDMA_CCONTROL_PROT2_MASK (0x1 << GPDMA_CCONTROL_PROT2_SHIFT) |
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#define | GPDMA_CCONTROL_PROT2(x) ((x) << GPDMA_CCONTROL_PROT2_SHIFT) |
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#define | GPDMA_CCONTROL_PROT3_SHIFT (30) |
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#define | GPDMA_CCONTROL_PROT3_MASK (0x1 << GPDMA_CCONTROL_PROT3_SHIFT) |
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#define | GPDMA_CCONTROL_PROT3(x) ((x) << GPDMA_CCONTROL_PROT3_SHIFT) |
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#define | GPDMA_CCONTROL_I_SHIFT (31) |
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#define | GPDMA_CCONTROL_I_MASK (0x1 << GPDMA_CCONTROL_I_SHIFT) |
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#define | GPDMA_CCONTROL_I(x) ((x) << GPDMA_CCONTROL_I_SHIFT) |
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#define | GPDMA_CCONFIG_E_SHIFT (0) |
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#define | GPDMA_CCONFIG_E_MASK (0x1 << GPDMA_CCONFIG_E_SHIFT) |
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#define | GPDMA_CCONFIG_E(x) ((x) << GPDMA_CCONFIG_E_SHIFT) |
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#define | GPDMA_CCONFIG_SRCPERIPHERAL_SHIFT (1) |
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#define | GPDMA_CCONFIG_SRCPERIPHERAL_MASK (0x1f << GPDMA_CCONFIG_SRCPERIPHERAL_SHIFT) |
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#define | GPDMA_CCONFIG_SRCPERIPHERAL(x) ((x) << GPDMA_CCONFIG_SRCPERIPHERAL_SHIFT) |
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#define | GPDMA_CCONFIG_DESTPERIPHERAL_SHIFT (6) |
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#define | GPDMA_CCONFIG_DESTPERIPHERAL_MASK (0x1f << GPDMA_CCONFIG_DESTPERIPHERAL_SHIFT) |
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#define | GPDMA_CCONFIG_DESTPERIPHERAL(x) ((x) << GPDMA_CCONFIG_DESTPERIPHERAL_SHIFT) |
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#define | GPDMA_CCONFIG_FLOWCNTRL_SHIFT (11) |
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#define | GPDMA_CCONFIG_FLOWCNTRL_MASK (0x7 << GPDMA_CCONFIG_FLOWCNTRL_SHIFT) |
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#define | GPDMA_CCONFIG_FLOWCNTRL(x) ((x) << GPDMA_CCONFIG_FLOWCNTRL_SHIFT) |
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#define | GPDMA_CCONFIG_IE_SHIFT (14) |
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#define | GPDMA_CCONFIG_IE_MASK (0x1 << GPDMA_CCONFIG_IE_SHIFT) |
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#define | GPDMA_CCONFIG_IE(x) ((x) << GPDMA_CCONFIG_IE_SHIFT) |
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#define | GPDMA_CCONFIG_ITC_SHIFT (15) |
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#define | GPDMA_CCONFIG_ITC_MASK (0x1 << GPDMA_CCONFIG_ITC_SHIFT) |
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#define | GPDMA_CCONFIG_ITC(x) ((x) << GPDMA_CCONFIG_ITC_SHIFT) |
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#define | GPDMA_CCONFIG_L_SHIFT (16) |
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#define | GPDMA_CCONFIG_L_MASK (0x1 << GPDMA_CCONFIG_L_SHIFT) |
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#define | GPDMA_CCONFIG_L(x) ((x) << GPDMA_CCONFIG_L_SHIFT) |
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#define | GPDMA_CCONFIG_A_SHIFT (17) |
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#define | GPDMA_CCONFIG_A_MASK (0x1 << GPDMA_CCONFIG_A_SHIFT) |
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#define | GPDMA_CCONFIG_A(x) ((x) << GPDMA_CCONFIG_A_SHIFT) |
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#define | GPDMA_CCONFIG_H_SHIFT (18) |
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#define | GPDMA_CCONFIG_H_MASK (0x1 << GPDMA_CCONFIG_H_SHIFT) |
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#define | GPDMA_CCONFIG_H(x) ((x) << GPDMA_CCONFIG_H_SHIFT) |
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#define | GPDMA_NTSTAT_INTSTAT_SHIFT (0) |
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#define | GPDMA_NTSTAT_INTSTAT_MASK (0xff << GPDMA_NTSTAT_INTSTAT_SHIFT) |
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#define | GPDMA_NTSTAT_INTSTAT(x) ((x) << GPDMA_NTSTAT_INTSTAT_SHIFT) |
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#define | GPDMA_INTTCSTAT_INTTCSTAT_SHIFT (0) |
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#define | GPDMA_INTTCSTAT_INTTCSTAT_MASK (0xff << GPDMA_INTTCSTAT_INTTCSTAT_SHIFT) |
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#define | GPDMA_INTTCSTAT_INTTCSTAT(x) ((x) << GPDMA_INTTCSTAT_INTTCSTAT_SHIFT) |
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#define | GPDMA_INTTCCLEAR_INTTCCLEAR_SHIFT (0) |
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#define | GPDMA_INTTCCLEAR_INTTCCLEAR_MASK (0xff << GPDMA_INTTCCLEAR_INTTCCLEAR_SHIFT) |
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#define | GPDMA_INTTCCLEAR_INTTCCLEAR(x) ((x) << GPDMA_INTTCCLEAR_INTTCCLEAR_SHIFT) |
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#define | GPDMA_INTERRSTAT_INTERRSTAT_SHIFT (0) |
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#define | GPDMA_INTERRSTAT_INTERRSTAT_MASK (0xff << GPDMA_INTERRSTAT_INTERRSTAT_SHIFT) |
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#define | GPDMA_INTERRSTAT_INTERRSTAT(x) ((x) << GPDMA_INTERRSTAT_INTERRSTAT_SHIFT) |
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#define | GPDMA_INTERRCLR_INTERRCLR_SHIFT (0) |
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#define | GPDMA_INTERRCLR_INTERRCLR_MASK (0xff << GPDMA_INTERRCLR_INTERRCLR_SHIFT) |
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#define | GPDMA_INTERRCLR_INTERRCLR(x) ((x) << GPDMA_INTERRCLR_INTERRCLR_SHIFT) |
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#define | GPDMA_RAWINTTCSTAT_RAWINTTCSTAT_SHIFT (0) |
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#define | GPDMA_RAWINTTCSTAT_RAWINTTCSTAT_MASK (0xff << GPDMA_RAWINTTCSTAT_RAWINTTCSTAT_SHIFT) |
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#define | GPDMA_RAWINTTCSTAT_RAWINTTCSTAT(x) ((x) << GPDMA_RAWINTTCSTAT_RAWINTTCSTAT_SHIFT) |
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#define | GPDMA_RAWINTERRSTAT_RAWINTERRSTAT_SHIFT (0) |
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#define | GPDMA_RAWINTERRSTAT_RAWINTERRSTAT_MASK (0xff << GPDMA_RAWINTERRSTAT_RAWINTERRSTAT_SHIFT) |
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#define | GPDMA_RAWINTERRSTAT_RAWINTERRSTAT(x) ((x) << GPDMA_RAWINTERRSTAT_RAWINTERRSTAT_SHIFT) |
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#define | GPDMA_ENBLDCHNS_ENABLEDCHANNELS_SHIFT (0) |
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#define | GPDMA_ENBLDCHNS_ENABLEDCHANNELS_MASK (0xff << GPDMA_ENBLDCHNS_ENABLEDCHANNELS_SHIFT) |
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#define | GPDMA_ENBLDCHNS_ENABLEDCHANNELS(x) ((x) << GPDMA_ENBLDCHNS_ENABLEDCHANNELS_SHIFT) |
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#define | GPDMA_SOFTBREQ_SOFTBREQ_SHIFT (0) |
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#define | GPDMA_SOFTBREQ_SOFTBREQ_MASK (0xffff << GPDMA_SOFTBREQ_SOFTBREQ_SHIFT) |
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#define | GPDMA_SOFTBREQ_SOFTBREQ(x) ((x) << GPDMA_SOFTBREQ_SOFTBREQ_SHIFT) |
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#define | GPDMA_SOFTSREQ_SOFTSREQ_SHIFT (0) |
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#define | GPDMA_SOFTSREQ_SOFTSREQ_MASK (0xffff << GPDMA_SOFTSREQ_SOFTSREQ_SHIFT) |
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#define | GPDMA_SOFTSREQ_SOFTSREQ(x) ((x) << GPDMA_SOFTSREQ_SOFTSREQ_SHIFT) |
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#define | GPDMA_SOFTLBREQ_SOFTLBREQ_SHIFT (0) |
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#define | GPDMA_SOFTLBREQ_SOFTLBREQ_MASK (0xffff << GPDMA_SOFTLBREQ_SOFTLBREQ_SHIFT) |
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#define | GPDMA_SOFTLBREQ_SOFTLBREQ(x) ((x) << GPDMA_SOFTLBREQ_SOFTLBREQ_SHIFT) |
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#define | GPDMA_SOFTLSREQ_SOFTLSREQ_SHIFT (0) |
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#define | GPDMA_SOFTLSREQ_SOFTLSREQ_MASK (0xffff << GPDMA_SOFTLSREQ_SOFTLSREQ_SHIFT) |
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#define | GPDMA_SOFTLSREQ_SOFTLSREQ(x) ((x) << GPDMA_SOFTLSREQ_SOFTLSREQ_SHIFT) |
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#define | GPDMA_CONFIG_E_SHIFT (0) |
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#define | GPDMA_CONFIG_E_MASK (0x1 << GPDMA_CONFIG_E_SHIFT) |
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#define | GPDMA_CONFIG_E(x) ((x) << GPDMA_CONFIG_E_SHIFT) |
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#define | GPDMA_CONFIG_M0_SHIFT (1) |
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#define | GPDMA_CONFIG_M0_MASK (0x1 << GPDMA_CONFIG_M0_SHIFT) |
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#define | GPDMA_CONFIG_M0(x) ((x) << GPDMA_CONFIG_M0_SHIFT) |
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#define | GPDMA_CONFIG_M1_SHIFT (2) |
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#define | GPDMA_CONFIG_M1_MASK (0x1 << GPDMA_CONFIG_M1_SHIFT) |
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#define | GPDMA_CONFIG_M1(x) ((x) << GPDMA_CONFIG_M1_SHIFT) |
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#define | GPDMA_SYNC_DMACSYNC_SHIFT (0) |
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#define | GPDMA_SYNC_DMACSYNC_MASK (0xffff << GPDMA_SYNC_DMACSYNC_SHIFT) |
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#define | GPDMA_SYNC_DMACSYNC(x) ((x) << GPDMA_SYNC_DMACSYNC_SHIFT) |
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#define | GPDMA_CxSRCADDR_SRCADDR_SHIFT (0) |
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#define | GPDMA_CxSRCADDR_SRCADDR_MASK (0xffffffff << GPDMA_CxSRCADDR_SRCADDR_SHIFT) |
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#define | GPDMA_CxSRCADDR_SRCADDR(x) ((x) << GPDMA_CxSRCADDR_SRCADDR_SHIFT) |
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#define | GPDMA_CxDESTADDR_DESTADDR_SHIFT (0) |
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#define | GPDMA_CxDESTADDR_DESTADDR_MASK (0xffffffff << GPDMA_CxDESTADDR_DESTADDR_SHIFT) |
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#define | GPDMA_CxDESTADDR_DESTADDR(x) ((x) << GPDMA_CxDESTADDR_DESTADDR_SHIFT) |
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#define | GPDMA_CxLLI_LM_SHIFT (0) |
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#define | GPDMA_CxLLI_LM_MASK (0x1 << GPDMA_CxLLI_LM_SHIFT) |
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#define | GPDMA_CxLLI_LM(x) ((x) << GPDMA_CxLLI_LM_SHIFT) |
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#define | GPDMA_CxLLI_LLI_SHIFT (2) |
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#define | GPDMA_CxLLI_LLI_MASK (0x3fffffff << GPDMA_CxLLI_LLI_SHIFT) |
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#define | GPDMA_CxLLI_LLI(x) ((x) << GPDMA_CxLLI_LLI_SHIFT) |
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#define | GPDMA_CxCONTROL_TRANSFERSIZE_SHIFT (0) |
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#define | GPDMA_CxCONTROL_TRANSFERSIZE_MASK (0xfff << GPDMA_CxCONTROL_TRANSFERSIZE_SHIFT) |
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#define | GPDMA_CxCONTROL_TRANSFERSIZE(x) ((x) << GPDMA_CxCONTROL_TRANSFERSIZE_SHIFT) |
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#define | GPDMA_CxCONTROL_SBSIZE_SHIFT (12) |
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#define | GPDMA_CxCONTROL_SBSIZE_MASK (0x7 << GPDMA_CxCONTROL_SBSIZE_SHIFT) |
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#define | GPDMA_CxCONTROL_SBSIZE(x) ((x) << GPDMA_CxCONTROL_SBSIZE_SHIFT) |
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#define | GPDMA_CxCONTROL_DBSIZE_SHIFT (15) |
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#define | GPDMA_CxCONTROL_DBSIZE_MASK (0x7 << GPDMA_CxCONTROL_DBSIZE_SHIFT) |
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#define | GPDMA_CxCONTROL_DBSIZE(x) ((x) << GPDMA_CxCONTROL_DBSIZE_SHIFT) |
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#define | GPDMA_CxCONTROL_SWIDTH_SHIFT (18) |
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#define | GPDMA_CxCONTROL_SWIDTH_MASK (0x7 << GPDMA_CxCONTROL_SWIDTH_SHIFT) |
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#define | GPDMA_CxCONTROL_SWIDTH(x) ((x) << GPDMA_CxCONTROL_SWIDTH_SHIFT) |
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#define | GPDMA_CxCONTROL_DWIDTH_SHIFT (21) |
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#define | GPDMA_CxCONTROL_DWIDTH_MASK (0x7 << GPDMA_CxCONTROL_DWIDTH_SHIFT) |
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#define | GPDMA_CxCONTROL_DWIDTH(x) ((x) << GPDMA_CxCONTROL_DWIDTH_SHIFT) |
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#define | GPDMA_CxCONTROL_S_SHIFT (24) |
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#define | GPDMA_CxCONTROL_S_MASK (0x1 << GPDMA_CxCONTROL_S_SHIFT) |
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#define | GPDMA_CxCONTROL_S(x) ((x) << GPDMA_CxCONTROL_S_SHIFT) |
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#define | GPDMA_CxCONTROL_D_SHIFT (25) |
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#define | GPDMA_CxCONTROL_D_MASK (0x1 << GPDMA_CxCONTROL_D_SHIFT) |
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#define | GPDMA_CxCONTROL_D(x) ((x) << GPDMA_CxCONTROL_D_SHIFT) |
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#define | GPDMA_CxCONTROL_SI_SHIFT (26) |
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#define | GPDMA_CxCONTROL_SI_MASK (0x1 << GPDMA_CxCONTROL_SI_SHIFT) |
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#define | GPDMA_Cx0CONTROL_SI(x) ((x) << GPDMA_CxCONTROL_SI_SHIFT) |
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#define | GPDMA_CxCONTROL_DI_SHIFT (27) |
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#define | GPDMA_CxCONTROL_DI_MASK (0x1 << GPDMA_CxCONTROL_DI_SHIFT) |
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#define | GPDMA_CxCONTROL_DI(x) ((x) << GPDMA_CxCONTROL_DI_SHIFT) |
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#define | GPDMA_CxCONTROL_PROT1_SHIFT (28) |
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#define | GPDMA_CxCONTROL_PROT1_MASK (0x1 << GPDMA_CxCONTROL_PROT1_SHIFT) |
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#define | GPDMA_CxCONTROL_PROT1(x) ((x) << GPDMA_CxCONTROL_PROT1_SHIFT) |
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#define | GPDMA_CxCONTROL_PROT2_SHIFT (29) |
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#define | GPDMA_CxCONTROL_PROT2_MASK (0x1 << GPDMA_CxCONTROL_PROT2_SHIFT) |
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#define | GPDMA_CxCONTROL_PROT2(x) ((x) << GPDMA_CxCONTROL_PROT2_SHIFT) |
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#define | GPDMA_CxCONTROL_PROT3_SHIFT (30) |
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#define | GPDMA_CxCONTROL_PROT3_MASK (0x1 << GPDMA_CxCONTROL_PROT3_SHIFT) |
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#define | GPDMA_CxCONTROL_PROT3(x) ((x) << GPDMA_CxCONTROL_PROT3_SHIFT) |
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#define | GPDMA_CxCONTROL_I_SHIFT (31) |
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#define | GPDMA_CxCONTROL_I_MASK (0x1 << GPDMA_CxCONTROL_I_SHIFT) |
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#define | GPDMA_CxCONTROL_I(x) ((x) << GPDMA_CxCONTROL_I_SHIFT) |
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#define | GPDMA_CxCONFIG_E_SHIFT (0) |
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#define | GPDMA_CxCONFIG_E_MASK (0x1 << GPDMA_CxCONFIG_E_SHIFT) |
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#define | GPDMA_CxCONFIG_E(x) ((x) << GPDMA_CxCONFIG_E_SHIFT) |
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#define | GPDMA_CxCONFIG_SRCPERIPHERAL_SHIFT (1) |
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#define | GPDMA_CxCONFIG_SRCPERIPHERAL_MASK (0x1f << GPDMA_CxCONFIG_SRCPERIPHERAL_SHIFT) |
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#define | GPDMA_CxCONFIG_SRCPERIPHERAL(x) ((x) << GPDMA_CxCONFIG_SRCPERIPHERAL_SHIFT) |
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#define | GPDMA_CxCONFIG_DESTPERIPHERAL_SHIFT (6) |
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#define | GPDMA_CxCONFIG_DESTPERIPHERAL_MASK (0x1f << GPDMA_CxCONFIG_DESTPERIPHERAL_SHIFT) |
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#define | GPDMA_CxCONFIG_DESTPERIPHERAL(x) ((x) << GPDMA_CxCONFIG_DESTPERIPHERAL_SHIFT) |
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#define | GPDMA_CxCONFIG_FLOWCNTRL_SHIFT (11) |
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#define | GPDMA_CxCONFIG_FLOWCNTRL_MASK (0x7 << GPDMA_CxCONFIG_FLOWCNTRL_SHIFT) |
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#define | GPDMA_CxCONFIG_FLOWCNTRL(x) ((x) << GPDMA_CxCONFIG_FLOWCNTRL_SHIFT) |
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#define | GPDMA_CxCONFIG_IE_SHIFT (14) |
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#define | GPDMA_CxCONFIG_IE_MASK (0x1 << GPDMA_CxCONFIG_IE_SHIFT) |
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#define | GPDMA_CxCONFIG_IE(x) ((x) << GPDMA_CxCONFIG_IE_SHIFT) |
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#define | GPDMA_CxCONFIG_ITC_SHIFT (15) |
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#define | GPDMA_CxCONFIG_ITC_MASK (0x1 << GPDMA_CxCONFIG_ITC_SHIFT) |
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#define | GPDMA_CxCONFIG_ITC(x) ((x) << GPDMA_CxCONFIG_ITC_SHIFT) |
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#define | GPDMA_CxCONFIG_L_SHIFT (16) |
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#define | GPDMA_CxCONFIG_L_MASK (0x1 << GPDMA_CxCONFIG_L_SHIFT) |
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#define | GPDMA_CxCONFIG_L(x) ((x) << GPDMA_CxCONFIG_L_SHIFT) |
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#define | GPDMA_CxCONFIG_A_SHIFT (17) |
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#define | GPDMA_CxCONFIG_A_MASK (0x1 << GPDMA_CxCONFIG_A_SHIFT) |
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#define | GPDMA_CxCONFIG_A(x) ((x) << GPDMA_CxCONFIG_A_SHIFT) |
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#define | GPDMA_CxCONFIG_H_SHIFT (18) |
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#define | GPDMA_CxCONFIG_H_MASK (0x1 << GPDMA_CxCONFIG_H_SHIFT) |
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#define | GPDMA_CxCONFIG_H(x) ((x) << GPDMA_CxCONFIG_H_SHIFT) |
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