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libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
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System Control Memory Timing Parameter Register 0 for Main Flash and EEPROM Register Values. More...
Macros | |
| #define | SYSCTL_MEMTIM0_EBCHT_SHIFT (22) |
| EEPROM Clock High Time Shift. More... | |
| #define | SYSCTL_MEMTIM0_EBCHT_MASK (0xF) |
| EEPROM Clock High Time Mask. More... | |
| #define | SYSCTL_MEMTIM0_EBCHT_0_POINT_5 (0x0) |
| EBCHT - 0.5 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_EBCHT_1 (0x1) |
| EBCHT - 1 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_EBCHT_1_POINT_5 (0x2) |
| EBCHT - 1.5 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_EBCHT_2 (0x3) |
| EBCHT - 2 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_EBCHT_2_POINT_5 (0x4) |
| EBCHT - 2.5 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_EBCHT_3 (0x5) |
| EBCHT - 3 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_EBCHT_3_POINT_5 (0x6) |
| EBCHT - 3.5 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_EBCHT_4 (0x7) |
| EBCHT - 4 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_EBCHT_4_POINT_5 (0x8) |
| EBCHT - 4.5 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_EBCE (1 << 21) |
| EEPROM Bank Clock Edge. More... | |
| #define | SYSCTL_MEMTIM0_EWS_SHIFT (16) |
| EEPROM Wait States Shift. More... | |
| #define | SYSCTL_MEMTIM0_EWS_MASK (0xF) |
| EEPROM Wait States Mask. More... | |
| #define | SYSCTL_MEMTIM0_EWS_1 (0x1) |
| EWS - 1 wait state. More... | |
| #define | SYSCTL_MEMTIM0_EWS_2 (0x2) |
| EWS - 2 wait state. More... | |
| #define | SYSCTL_MEMTIM0_EWS_3 (0x3) |
| EWS - 3 wait state. More... | |
| #define | SYSCTL_MEMTIM0_EWS_4 (0x4) |
| EWS - 4 wait state. More... | |
| #define | SYSCTL_MEMTIM0_EWS_5 (0x5) |
| EWS - 5 wait state. More... | |
| #define | SYSCTL_MEMTIM0_EWS_6 (0x6) |
| EWS - 6 wait state. More... | |
| #define | SYSCTL_MEMTIM0_EWS_7 (0x7) |
| EWS - 7 wait state. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_SHIFT (6) |
| Flash Clock High Time Shift. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_MASK (0xF) |
| Flash Clock High Time Mask. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_0_POINT_5 (0x0) |
| FBCHT - 0.5 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_1 (0x1) |
| FBCHT - 1 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_1_POINT_5 (0x2) |
| FBCHT - 1.5 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_2 (0x3) |
| FBCHT - 2 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_2_POINT_5 (0x4) |
| FBCHT - 2.5 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_3 (0x5) |
| FBCHT - 3 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_3_POINT_5 (0x6) |
| FBCHT - 3.5 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_4 (0x7) |
| FBCHT - 4 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_FBCHT_4_POINT_5 (0x8) |
| FBCHT - 4.5 sys clock period. More... | |
| #define | SYSCTL_MEMTIM0_FBCE (1 << 5) |
| Flash Bank Clock Edge. More... | |
| #define | SYSCTL_MEMTIM0_FWS_SHIFT (0) |
| Flash Wait States Shift. More... | |
| #define | SYSCTL_MEMTIM0_FWS_MASK (0xF) |
| Flash Wait States Mask. More... | |
| #define | SYSCTL_MEMTIM0_FWS_1 (0x1) |
| FWS - 1 wait state. More... | |
| #define | SYSCTL_MEMTIM0_FWS_2 (0x2) |
| FWS - 2 wait state. More... | |
| #define | SYSCTL_MEMTIM0_FWS_3 (0x3) |
| FWS - 3 wait state. More... | |
| #define | SYSCTL_MEMTIM0_FWS_4 (0x4) |
| FWS - 4 wait state. More... | |
| #define | SYSCTL_MEMTIM0_FWS_5 (0x5) |
| FWS - 5 wait state. More... | |
| #define | SYSCTL_MEMTIM0_FWS_6 (0x6) |
| FWS - 6 wait state. More... | |
| #define | SYSCTL_MEMTIM0_FWS_7 (0x7) |
| FWS - 7 wait state. More... | |
System Control Memory Timing Parameter Register 0 for Main Flash and EEPROM Register Values.
| CPU Frequency Range (f) in MHZ | FBCHT and EBCHT | FBCE and EBCE | FWS and EWS |
|---|---|---|---|
| 16 | 0x0 (1/2) | 0x1 | 0x0 |
| 16 < f <= 40 | 0x2 (1.5) | 0x0 | 0x1 |
| 40 < f <= 60 | 0x3 (2) | 0x0 | 0x2 |
| 60 < f <= 80 | 0x4 (2.5) | 0x0 | 0x3 |
| 80 < f <= 100 | 0x5 (3) | 0x0 | 0x4 |
| 100 < f <= 120 | 0x6 (3.5) | 0x0 | 0x5 |
| #define SYSCTL_MEMTIM0_EBCE (1 << 21) |
EEPROM Bank Clock Edge.
Definition at line 722 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_0_POINT_5 (0x0) |
EBCHT - 0.5 sys clock period.
Definition at line 704 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_1 (0x1) |
EBCHT - 1 sys clock period.
Definition at line 706 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_1_POINT_5 (0x2) |
EBCHT - 1.5 sys clock period.
Definition at line 708 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_2 (0x3) |
EBCHT - 2 sys clock period.
Definition at line 710 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_2_POINT_5 (0x4) |
EBCHT - 2.5 sys clock period.
Definition at line 712 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_3 (0x5) |
EBCHT - 3 sys clock period.
Definition at line 714 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_3_POINT_5 (0x6) |
EBCHT - 3.5 sys clock period.
Definition at line 716 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_4 (0x7) |
EBCHT - 4 sys clock period.
Definition at line 718 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_4_POINT_5 (0x8) |
EBCHT - 4.5 sys clock period.
Definition at line 720 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_MASK (0xF) |
EEPROM Clock High Time Mask.
Definition at line 702 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EBCHT_SHIFT (22) |
EEPROM Clock High Time Shift.
Definition at line 700 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EWS_1 (0x1) |
EWS - 1 wait state.
Definition at line 728 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EWS_2 (0x2) |
EWS - 2 wait state.
Definition at line 730 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EWS_3 (0x3) |
EWS - 3 wait state.
Definition at line 732 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EWS_4 (0x4) |
EWS - 4 wait state.
Definition at line 734 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EWS_5 (0x5) |
EWS - 5 wait state.
Definition at line 736 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EWS_6 (0x6) |
EWS - 6 wait state.
Definition at line 738 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EWS_7 (0x7) |
EWS - 7 wait state.
Definition at line 740 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EWS_MASK (0xF) |
EEPROM Wait States Mask.
Definition at line 726 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_EWS_SHIFT (16) |
EEPROM Wait States Shift.
Definition at line 724 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCE (1 << 5) |
Flash Bank Clock Edge.
Definition at line 764 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_0_POINT_5 (0x0) |
FBCHT - 0.5 sys clock period.
Definition at line 746 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_1 (0x1) |
FBCHT - 1 sys clock period.
Definition at line 748 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_1_POINT_5 (0x2) |
FBCHT - 1.5 sys clock period.
Definition at line 750 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_2 (0x3) |
FBCHT - 2 sys clock period.
Definition at line 752 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_2_POINT_5 (0x4) |
FBCHT - 2.5 sys clock period.
Definition at line 754 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_3 (0x5) |
FBCHT - 3 sys clock period.
Definition at line 756 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_3_POINT_5 (0x6) |
FBCHT - 3.5 sys clock period.
Definition at line 758 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_4 (0x7) |
FBCHT - 4 sys clock period.
Definition at line 760 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_4_POINT_5 (0x8) |
FBCHT - 4.5 sys clock period.
Definition at line 762 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_MASK (0xF) |
Flash Clock High Time Mask.
Definition at line 744 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FBCHT_SHIFT (6) |
Flash Clock High Time Shift.
Definition at line 742 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FWS_1 (0x1) |
FWS - 1 wait state.
Definition at line 770 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FWS_2 (0x2) |
FWS - 2 wait state.
Definition at line 772 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FWS_3 (0x3) |
FWS - 3 wait state.
Definition at line 774 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FWS_4 (0x4) |
FWS - 4 wait state.
Definition at line 776 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FWS_5 (0x5) |
FWS - 5 wait state.
Definition at line 778 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FWS_6 (0x6) |
FWS - 6 wait state.
Definition at line 780 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FWS_7 (0x7) |
FWS - 7 wait state.
Definition at line 782 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FWS_MASK (0xF) |
Flash Wait States Mask.
Definition at line 768 of file systemcontrol.h.
| #define SYSCTL_MEMTIM0_FWS_SHIFT (0) |
Flash Wait States Shift.
Definition at line 766 of file systemcontrol.h.
1.9.4