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#define | USART_CR1(usart_base) MMIO32((usart_base) + 0x00) |
| Control register 1 (USARTx_CR1) More...
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#define | USART1_CR1 USART_CR1(USART1_BASE) |
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#define | USART2_CR1 USART_CR1(USART2_BASE) |
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#define | USART3_CR1 USART_CR1(USART3_BASE) |
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#define | USART_CR2(usart_base) MMIO32((usart_base) + 0x04) |
| Control register 2 (USARTx_CR2) More...
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#define | USART1_CR2 USART_CR2(USART1_BASE) |
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#define | USART2_CR2 USART_CR2(USART2_BASE) |
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#define | USART3_CR2 USART_CR2(USART3_BASE) |
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#define | USART_CR3(usart_base) MMIO32((usart_base) + 0x08) |
| Control register 3 (USARTx_CR3) More...
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#define | USART1_CR3 USART_CR3(USART1_BASE) |
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#define | USART2_CR3 USART_CR3(USART2_BASE) |
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#define | USART3_CR3 USART_CR3(USART3_BASE) |
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#define | USART_BRR(usart_base) MMIO32((usart_base) + 0x0C) |
| Baud rate register (USARTx_BRR) More...
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#define | USART1_BRR USART_BRR(USART1_BASE) |
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#define | USART2_BRR USART_BRR(USART2_BASE) |
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#define | USART3_BRR USART_BRR(USART3_BASE) |
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#define | USART_GTPR(usart_base) MMIO32((usart_base) + 0x10) |
| Guard time and prescaler register (USARTx_GTPR) More...
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#define | USART1_GTPR USART_GTPR(USART1_BASE) |
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#define | USART2_GTPR USART_GTPR(USART2_BASE) |
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#define | USART3_GTPR USART_GTPR(USART3_BASE) |
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#define | USART_RTOR(usart_base) MMIO32((usart_base) + 0x14) |
| Receiver timeout register (USART_RTOR) More...
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#define | USART1_RTOR USART_RTOR(USART1_BASE) |
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#define | USART2_RTOR USART_RTOR(USART2_BASE) |
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#define | USART3_RTOR USART_RTOR(USART3_BASE) |
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#define | USART_RQR(usart_base) MMIO32((usart_base) + 0x18) |
| Request register (USART_RQR) More...
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#define | USART1_RQR USART_RQR(USART1_BASE) |
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#define | USART2_RQR USART_RQR(USART2_BASE) |
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#define | USART3_RQR USART_RQR(USART3_BASE) |
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#define | USART_ISR(usart_base) MMIO32((usart_base) + 0x1C) |
| Interrupt & status register (USART_ISR) More...
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#define | USART1_ISR USART_ISR(USART1_BASE) |
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#define | USART2_ISR USART_ISR(USART2_BASE) |
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#define | USART3_ISR USART_ISR(USART3_BASE) |
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#define | USART_ICR(usart_base) MMIO32((usart_base) + 0x20) |
| Interrupt flag clear register (USART_ICR) More...
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#define | USART1_ICR USART_ICR(USART1_BASE) |
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#define | USART2_ICR USART_ICR(USART2_BASE) |
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#define | USART3_ICR USART_ICR(USART3_BASE) |
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#define | USART_RDR(usart_base) MMIO32((usart_base) + 0x24) |
| Receive data register (USART_RDR) More...
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#define | USART1_RDR USART_RDR(USART1_BASE) |
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#define | USART2_RDR USART_RDR(USART2_BASE) |
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#define | USART3_RDR USART_RDR(USART3_BASE) |
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#define | USART_TDR(usart_base) MMIO32((usart_base) + 0x28) |
| Transmit data register (USART_TDR) More...
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#define | USART1_TDR USART_TDR(USART1_BASE) |
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#define | USART2_TDR USART_TDR(USART2_BASE) |
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#define | USART3_TDR USART_TDR(USART3_BASE) |
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