libopencm3
A free/libre/open-source firmware library for various ARM Cortex-M3 microcontrollers.
uart.c
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1/** @defgroup VF6xx_uart UART
2 *
3 * @ingroup VF6xx
4 *
5 * @section vf6xx_uart_api_ex UART API.
6 *
7 * @brief <b>VF6xx Universal Asynchronous Receiver/Transmitter (UART)</b>
8 *
9 * @author @htmlonly &copy; @endhtmlonly 2014 Stefan Agner <stefan@agner.ch>
10 *
11 * @date 03 July 2014
12 *
13 * This library supports the UART in the VF6xx SoC of Freescale.
14 * Devices can have up to 6 UARTs.
15 *
16 * LGPL License Terms @ref lgpl_license
17 */
18/*
19 * This file is part of the libopencm3 project.
20 *
21 * Copyright (C) 2014 Stefan Agner <stefan@agner.ch>
22 *
23 * This library is free software: you can redistribute it and/or modify
24 * it under the terms of the GNU Lesser General Public License as published by
25 * the Free Software Foundation, either version 3 of the License, or
26 * (at your option) any later version.
27 *
28 * This library is distributed in the hope that it will be useful,
29 * but WITHOUT ANY WARRANTY; without even the implied warranty of
30 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
31 * GNU Lesser General Public License for more details.
32 *
33 * You should have received a copy of the GNU Lesser General Public License
34 * along with this library. If not, see <http://www.gnu.org/licenses/>.
35 */
36
37/**@{*/
38
41
42/*---------------------------------------------------------------------------*/
43/** @brief UART Set Baudrate.
44
45The baud rate is computed from the IPG bus clock. The bus clock must be
46calculated by using @ref ccm_calculate_clocks before calling this function.
47
48@param[in] uart unsigned 32 bit. UART block register address base @ref
49uart_reg_base
50@param[in] baud unsigned 32 bit. Baud rate specified in Hz.
51*/
52
53void uart_set_baudrate(uint32_t uart, uint32_t baud)
54{
55 uint32_t bd_clk = ccm_ipg_bus_clk / baud;
56 uint32_t sbr;
57
58 /* Round up if LSB is one... */
59 bd_clk /= 8;
60 sbr = bd_clk / 2 + (bd_clk & 0x1);
61
62 UART_BDL(uart) = sbr & UART_BDL_SBR_MASK;
63 UART_BDH(uart) = (sbr >> 8) & UART_BDH_SBR_MASK;
64}
65
66/*---------------------------------------------------------------------------*/
67/** @brief UART Set Parity.
68
69The parity bit can be selected as none, even or odd.
70
71@param[in] uart unsigned 32 bit. UART block register address base @ref
72uart_reg_base
73@param[in] parity unsigned 8 bit. Parity @ref uart_parity.
74*/
75
76void uart_set_parity(uint32_t uart, uint8_t parity)
77{
78 uint8_t reg8;
79
80 reg8 = UART_C1(uart);
81 reg8 = (reg8 & ~UART_PARITY_MASK) | parity;
82 UART_C1(uart) = reg8;
83}
84
85/*---------------------------------------------------------------------------*/
86/** @brief UART Set Hardware Flow Control.
87
88The flow control bit can be selected as none, RTS, CTS or RTS+CTS.
89
90@param[in] uart unsigned 32 bit. UART block register address base @ref
91uart_reg_base
92@param[in] flowcontrol unsigned 8 bit. Flowcontrol @ref uart_cr3_flowcontrol.
93*/
94
95void uart_set_flow_control(uint32_t uart, uint8_t flowcontrol)
96{
97 uint8_t reg8;
98
99 reg8 = UART_MODEM(uart);
100 reg8 = (reg8 & ~UART_FLOWCONTROL_MASK) | flowcontrol;
101 UART_MODEM(uart) = reg8;
102}
103
104/*---------------------------------------------------------------------------*/
105/** @brief UART Enable.
106
107Enable Tramitter and Receiver
108
109@param[in] uart unsigned 32 bit. UART block register address base @ref
110uart_reg_base
111*/
112
113void uart_enable(uint32_t uart)
114{
115 UART_C2(uart) |= (UART_C2_TE | UART_C2_RE);
116}
117
118/*---------------------------------------------------------------------------*/
119/** @brief UART Disable.
120
121At the end of the current frame, the UART is disabled to reduce power.
122
123@param[in] uart unsigned 32 bit. UART block register address base @ref
124uart_reg_base
125*/
126
127void uart_disable(uint32_t uart)
128{
129 UART_C2(uart) &= ~(UART_C2_TE | UART_C2_RE);
130}
131
132/*---------------------------------------------------------------------------*/
133/** @brief UART Send a Data Word.
134 *
135 * @param[in] uart unsigned 32 bit. UART block register address base @ref
136 * uart_reg_base
137 * @param[in] data unsigned 8 bit.
138 */
139
140void uart_send(uint32_t uart, uint8_t data)
141{
142 UART_D(uart) = data;
143}
144
145/*---------------------------------------------------------------------------*/
146/** @brief UART Wait for Transmit Data Buffer Empty
147 *
148 * Blocks until the transmit data buffer becomes empty and is ready to accept
149 * the next data word.
150 *
151 * @param[in] uart unsigned 32 bit. UART block register address base @ref
152 * uart_reg_base
153 */
154
155void uart_wait_send_ready(uint32_t uart)
156{
157 /* Wait until the data has been transferred into the shift register. */
158 while ((UART_S1(uart) & UART_S1_TC) == 0);
159}
160
161/*---------------------------------------------------------------------------*/
162/** @brief UART Send Data byte blocking
163 *
164 * Blocks until the transmit data buffer becomes empty before sending the
165 * next (given) byte.
166 * @param[in] uart unsigned 32 bit. UART block register address base @ref
167 * uart_reg_base
168 * @param[in] data unsigned 8 bit.
169 */
170
171void uart_send_blocking(uint32_t uart, uint8_t data)
172{
174 uart_send(uart, data);
175}
176
177/*---------------------------------------------------------------------------*/
178/** @brief UART Read a Received Data Word.
179 *
180 * @param[in] uart unsigned 32 bit. UART block register address base @ref
181 * uart_reg_base
182 * @returns unsigned 8 bit data word.
183 */
184
185uint8_t uart_recv(uint32_t uart)
186{
187 /* Receive data. */
188 return UART_D(uart);
189}
190
191/*---------------------------------------------------------------------------*/
192/** @brief UART Wait for Received Data Available
193 *
194 * Blocks until the receive data buffer holds a valid received data word.
195 *
196 * @param[in] uart unsigned 32 bit. UART block register address base @ref
197 * uart_reg_base
198 */
199
200void uart_wait_recv_ready(uint32_t uart)
201{
202 /* Wait until the data is ready to be received. */
203 while ((UART_S1(uart) & UART_S1_RDRF) == 0);
204}
205
206
207/*---------------------------------------------------------------------------*/
208/** @brief UART Read a Received Data Word with Blocking.
209
210Wait until a data word has been received then return the word.
211
212@param[in] uart unsigned 32 bit. UART block register address base @ref
213uart_reg_base
214@returns unsigned 16 bit data word.
215*/
216
217uint8_t uart_recv_blocking(uint32_t uart)
218{
220
221 return uart_recv(uart);
222}
223
224/**@}*/
225
void uart_disable(uint32_t uart)
UART Disable.
Definition: uart.c:127
void uart_set_baudrate(uint32_t uart, uint32_t baud)
UART Set Baudrate.
Definition: uart.c:53
void uart_send(uint32_t uart, uint8_t data)
UART Send a Data Word.
Definition: uart.c:140
void uart_wait_recv_ready(uint32_t uart)
UART Wait for Received Data Available.
Definition: uart.c:200
uint8_t uart_recv(uint32_t uart)
UART Read a Received Data Word.
Definition: uart.c:185
void uart_set_parity(uint32_t uart, uint8_t parity)
UART Set Parity.
Definition: uart.c:76
void uart_wait_send_ready(uint32_t uart)
UART Wait for Transmit Data Buffer Empty.
Definition: uart.c:155
void uart_enable(uint32_t uart)
UART Enable.
Definition: uart.c:113
void uart_send_blocking(uint32_t uart, uint8_t data)
UART Send Data byte blocking.
Definition: uart.c:171
uint8_t uart_recv_blocking(uint32_t uart)
UART Read a Received Data Word with Blocking.
Definition: uart.c:217
void uart_set_flow_control(uint32_t uart, uint8_t flowcontrol)
UART Set Hardware Flow Control.
Definition: uart.c:95
uint32_t ccm_ipg_bus_clk
Definition: ccm.c:54
#define UART_BDH(uart_base)
Definition: uart.h:57
#define UART_BDH_SBR_MASK
Definition: uart.h:78
#define UART_MODEM(uart_base)
Definition: uart.h:70
#define UART_C2_TE
Definition: uart.h:97
#define UART_BDL_SBR_MASK
Definition: uart.h:81
#define UART_S1_RDRF
Definition: uart.h:105
#define UART_S1_TC
Definition: uart.h:104
#define UART_C1(uart_base)
Definition: uart.h:59
#define UART_D(uart_base)
Definition: uart.h:64
#define UART_S1(uart_base)
Definition: uart.h:61
#define UART_BDL(uart_base)
Definition: uart.h:58
#define UART_C2(uart_base)
Definition: uart.h:60
#define UART_C2_RE
Definition: uart.h:98